As fare as I have researched UVLO Under Low Voltage Lockout is a circuit which is used to turn off and on the output power of a electronic device according to voltage selected. For instance in a charging circuit the power will only flow to the load once the capacitor has charged to a certain point, upon discharge the UVLO will stop the flow of power after this value of voltage. Am i correct in assumption of this operation. A circuit diagram of this has bee attached. Can anybody Explain what the Hysteresis does as i can not find any material which explains this? although In my understanding of hysteresis is when a ferromagnetic material wen put with a electric field will hit the remenent saturation point at this point if the field is reversed the ferromagnetic material will never return to zero in fact it will return to the opposite saturation point thus forming a loop effect. I dont understand how this would relate to the UVLO.