Why and how does static electricity destroy chips?

[eman3]

I'm trying to understand why static discharge (or just plain high voltage) damages semiconductors, in particular integrated circuits. What happens when a chip gets hit by a voltage spike that it can't handle?

 

[mdjensen22]

http://www.siliconfareast.com/eosesd_failures.htm
It's 2 pages, but that should answer your questions.

 

[eman3]

Thanks! The site as a whole looks like an amazing resource on semiconductor failures. Is there anything similar covering ESD protection mechanisms?

 

[DragonPetter]

This should help too:
http://en.wikipedia.org/wiki/Breakdown_voltageESD is a collection of charge at high voltage that, in the big picture is low energy, but it is all discharged very quickly so that it can still do damage. The voltage that an ESD zap can give is in the kV range.

A lot of semiconductor designs are made to withstand 8000V or 16000V. That is a lot of voltage, so it is almost obvious that it would be bad for any non conductor that isn't protected. Since the actual devices have such small structure, even a small amount of charge with this much energy can damage it.

That is why capacitors are one way of protecting against ESD, because even though the capacitor may be rated for a much lower voltage, the actual amount of energy from an ESD zap is small so that the capacitor can suck it up and lower the voltage before the charge can try to breakthrough the material. Edit: Usually you don't use JUST capacitors, although sometimes you can. Capacitors are used in conjunction with a breakdown device that artificially(its not damaged) breaks down well before the semiconductor you're trying to protect would break down. Example would be putting a 10V zener or transorb to shunt the ESD, but its always good to have a cap in parallel if you can.

 

[gnurf]

http://www.siliconfareast.com/eosesd_failures.htm

Summary for the average lazy forum user:

There are three frequently-encountered and basic mechanisms by which a device is damaged by EOS or ESD. These mechanisms are:

1) Dielectric or oxide punchthrough
Dielectric or oxide punchthrough refers to the EOS/ESD mechanism involving a voltage pulse that is large enough to rupture an oxide or dielectric layer.

2) Fusing of a conductor or resistor
The phrase 'Conductor/Resistor Fusing' literally pertains to a metal line or resistor that acted as a 'fuse', or one that has become open due to excessive current. Such melting of a metal or resistor line is often due to intense heat produced by excessive power dissipation, or joule heating, caused by an EOS/ESD event that involves a large current flow through the conductor or resistor.

3) Junction damage or burn-out
Junction damage or burn-out refers to the destruction of a p-n junction due to joule-heating caused by the EOS/ESD event, resulting either in the junction's being open- or short-circuited. This type of damage also involves joule heating, and is more prevalent in bipolar devices.

 

[eman3]

Dragon- Thanks, that's quite interesting. What happens when ESD protection devices aren't enough?

(Presumably they aren't perfect, or we wouldn't get electronic components like hard drives in silver baggies.)

 

[yungman]

It is mainly the current that burn the trace and or transistors etc inside. You don't need high voltage. I designed IC before, if you look under the microscope, it has metal traces, transistors, resistors etc. Just like real circuit! When even we need to modify the circuit and need to cut a trace, we use two needle probe sticking to both ends of the trace to be cut, then discharge a cap that was charged to some battery voltage. You can see the trace explode under the microscope.

Remember, inside the chip, heat dissipation is very poor, you pass a shot of current, it heat up and melted.

As for HV discharge, remember the even a very small capacitor charged up to high voltage have a lot of charge in the cap even though the capacitance is very low. If you short the cap, all the current discharged in matter of sub nano seconds, the instantaneous current is very high and melt any connections inside the IC.

HV discharge can easily reach hundreds of Amps of instantaneous current even though it last only less than one nano second. You burn relay contacts, and other large connections. I know, I work with 10KV+ circuits and we need to buy special relays with tungsten contacts, or else, it get burn just from a few arc and was like $50+ each. This is with just discharge from capacitance of a 2' coax cable that is only about 60pF.

 

[eman3]

yungman, thanks! That's pretty incredible. Have you ever looked at chips with built-in ESD protection, like DragonPetter was talking about? (capacitors and diodes to prevent overvoltage) Have you ever seen a failure despite ESD protection? How did that happen?

 

[DragonPetter]

yungman, thanks! That's pretty incredible. Have you ever looked at chips with built-in ESD protection, like DragonPetter was talking about? (capacitors and diodes to prevent overvoltage) Have you ever seen a failure despite ESD protection? How did that happen?

I have seen failures despite ESD protection. At my old job we used this ESD gun that had a metal tip on it, and I would just keep zapping my design with it (outside the housing). The reason it still got hurt sometimes is that ESD is unpredictable and can jump to any part of the circuit that it can get to. This is why its necessary to protect all I/O exposed to the ESD source, its better to be safe than sorry. You need protection that can respond fast enough to the zap too.

And of course, an IC is rated for certain levels of ESD with different models (which correspond to different amounts of energy/charge in a zap). So if an ESD exceeds that rating, its possible to still destroy the chip.

 

[eman3]

DragonPetter: That makes sense. What about when all exposed I/O was protected, and the failure occurred despite ESD coming in on a protected line?

 

[DragonPetter]

DragonPetter: That makes sense. What about when all exposed I/O was protected, and the failure occurred despite ESD coming in on a protected line?

Once all the holes were plugged it was hard to get a failure. Its just like I said that ESD is unpredictable and it can jump to other parts of the circuit if you don't have enough protection.

Another good way to protect is to ground the chassis and surround as much of your circuitry with ground as you can. Also, it is much less likely in humid environments, which is why some electronics manufacturers keep a certain level of humidity in the factory.

 

[eman3]

DragonPetter: Fair enough, but it sounds like you still had some failures. What caused the ESD protection to fail?

(Anyone else have experiences with ESD protection failures? yungman?)

 

[DragonPetter]

DragonPetter: Fair enough, but it sounds like you still had some failures. What caused the ESD protection to fail?

(Anyone else have experiences with ESD protection failures? yungman?)

I don't know what caused it, other than that we were testing it beyond its required specifications at times. The design was a display you'd find in semi-trucks or tractors, and so the ESD had a lot of paths to take (touch screen ribbon cable, LCD ribbon cable, connector cable) and we went to fairly extreme measures to do everything in our control to minimize paths to sensitive components.

The problem was that the LCD signal lines were fairly high frequency and many signals, and so it was impractical to put our usual ESD protection components on those signals. We had to rely on the air gap between the metal housing and the touch screen glass to be tight enough tolerance to try to shunt ESD away from those ribbon cables.

I've never met such an ESD enthusiast like you before.

 

[yungman]

You can only protect so much. We worked with 10KV+ high power circuits, we blown real transorbs...in parallel. Like those P6KExx in parallel. You can only put a limited size protection inside the IC as the capacitance will be a major factor. Those big transorbs has tens of pF cap, that is not going to work for any speed. Don't count on the input protection inside the IC. We can't even count on the diodes outside the IC! I always use cheap long body carbon comp resistor in series with the input before the protection. As I said before, the instantaneous current is easily hundreds of A, even a few hundred ohms resistor will limit the current. But you cannot use any film or short body resistor, they jump over the body, they burn open...It's the current.

 

[DragonPetter]

Don't count on the input protection inside the IC. We can't even count on the diodes outside the IC! I always use cheap long body carbon comp resistor in series with the input before the protection. As I said before, the instantaneous current is easily hundreds of A, even a few hundred ohms resistor will limit the current. But you cannot use any film or short body resistor, they jump over the body, they burn open...It's the current.

That is a good point. I have seen naive designs that I had to help review and the engineer told us the IC had internal ESD protection. Some senior engineers informed him how this is a naive approach to compatibility requirements.

I usually consider that the internal ESD protection is there more for the manufacturing/shipping of the IC before it is even soldered to a board than it is there for its operating lifetime. Its best not to take ESD for granted, there are figures that say annual ESD damage results in billions of dollars of lost money. What's worse is that ESD damage can occur and the device sometimes will still operate for a certain amount of time before it eventually fails, so that a failure is hard to predict or know its source. This is really serious when electronics are used in human safety applications.

 

[eman3]

DragonPetter: I'm trying to figure out where some failures are coming from despite the chips all having fairly good internal ESD protection on every line that could even remotely be getting hit. The problem is the device has to be too small to do protection off the IC.

Yungman: That's more or less what I was afraid of. Have you found that embedding the chip in a bubble of epoxy (ASIC style) keeps voltage from jumping around internally and escaping the protection? Does the protection inside the IC work better against certain kinds of transients, and fail more quickly against others? (fast risetime low current vs slower high current, for example)

 

[DragonPetter]

DragonPetter: I'm trying to figure out where some failures are coming from despite the chips all having fairly good internal ESD protection on every line that could even remotely be getting hit. The problem is the device has to be too small to do protection off the IC.

Yungman: That's more or less what I was afraid of. Have you found that embedding the chip in a bubble of epoxy (ASIC style) keeps voltage from jumping around internally and escaping the protection? Does the protection inside the IC work better against certain kinds of transients, and fail more quickly against others? (fast risetime low current vs slower high current, for example)

You can still do PCB layout strategies to help minimize problems. A grounded guard ring around the PCB and the traces and keeping your sensitive components as far away from the point of entry are two ways. Also, if you can cage your design in ground, either through the housing or some of these cages you can buy for PCBs, they should also help.

Does your PCB have a ground and power plane?

Edit: Also, I am a bit skeptical that you can't find room for a zener diode (knee voltage has to be relatively higher than normal voltage conditions but much less than the ESD voltage). You can even buy ESD protection chips that come as an array to save space. Is the device used in spying or going inside someone's body that it has to be so small?

 

[eman3]

DragonPetter: That would be nice, but what little PCB space there is already quite fully occupied, by which I mean jam packed. (It's a sensor to help improve the efficiency of power plants in 3rd world countries. It has to be simple and tiny enough that the end users can retrofit it into whatever space is available on old equipment.)

yungman, that's why your experience is particularly great to hear about, since some of the operating environments can and do have 10kV or much more!One thing we can do, though, is work with the users on minor modifications to insulation/grounding/shielding in the device area, which makes a huge difference in what kind of discharges the device sees. That's why I'd love to hear more about what kind of discharges cause the most problems, and which ones don't.

 

[yungman]

That is a good point. I have seen naive designs that I had to help review and the engineer told us the IC had internal ESD protection. Some senior engineers informed him how this is a naive approach to compatibility requirements.

I usually consider that the internal ESD protection is there more for the manufacturing/shipping of the IC before it is even soldered to a board than it is there for its operating lifetime. Its best not to take ESD for granted, there are figures that say annual ESD damage results in billions of dollars of lost money. What's worse is that ESD damage can occur and the device sometimes will still operate for a certain amount of time before it eventually fails, so that a failure is hard to predict or know its source. This is really serious when electronics are used in human safety applications.

The CMOS stuffs are a lot more rugged today than the good old 4000 series I used in the late 70s. I remember in those days, you have to really be careful when handling the ICs. If you don't ground yourself and transfer in conductive foam, you burn them easily. The worst part is they got injured. I had never seen one burnt right away, but it was so predictable that if I touch a certain part without precaution, the chip would die in a few days. The 4049 was one of the most sensitive ones.

Remember it is all about the size of the trace or the device in the chip. At instantaneous surge of hundreds of A, there is no time for heat to spread out, heat build up locally and just melt the circuit. The bigger diodes like P6KExx or the 1.5KExx are much bigger and robust inside, so they can take a lot more. That's also the reason why I called for carbon comp resistors for protection. Metal film only have conductive material on the surface, not inside the body. When the big surge, it burn the metal film resistor just like that. Just choose resistors by wattage is useless in this kind of work. Also, you need long body so the the arc won't creep over the surface. People think insulation strength is the most important, but actually the surface creepage is more of a problem in HV and ESD discharge.

I believe all the CMOS ICs has protection now. For human touching, it is not too bad yet. Small device inside the chip can help quite bit. But I found the series resistor I mentioned is very effective particular when you are dealing with high speed signal where putting a P6KExx is absolutely out of the question. A few years ago when I was still doing designs, I used surface mount transorbs that have only few pF capacitance for all the digital signals. I never had anything burnt.

 

[mdjensen22]

Consult the datasheet of your device for specifications, but as was stated above, it isn't good practice to count on the internal protection parts for much of anything.

Most of the internal protection diodes are relatively slow and cannot handle a lot of power. A simple RC LPF can do wonders in making those internal protection diodes far more effective.

Yungman is dead on when he says that ESD issues don't necessarily equal instant death. Those are the worst ones too because they work fine...at first.