Why is NGSPICE giving me wrong results for my inverter simulation?

[Kholdstare]

I was trying to simulate basic inverter with mosis IBM 65nm model file (lvl 54 BSIM 4.3.0). And I am getting a delay of 4ns whereas I should get 8-15 ps. I don't understand why it is giving me wrong results. I suspect ngspice (ver 24) is doing it wrong.

Thnx

subckt.txt

* Inverter
.SUBCKT INV IN OUT
M1 OUT IN GND GND nmos
M2 OUT IN VDD VDD pmos
.ENDS

test.txt

* Inverter

.INCLUDE D:\ngspice\bin\0_Models_mosis_ibm_65nm_l54.ftr
.INCLUDE D:\ngspice\bin\subckt.txt
.GLOBAL GND VDD

XINV IN OUT INV
VDD VDD GND 1V
VIN IN GND PWL(0 0 10ns 0 10.1ns 1 30ns 1 30.1ns 0)

.TRAN 0.01ns 50ns
.END

.CONTROL
run
plot in out
.ENDC

 

[Kholdstare]

Bump. I even see high capacitive Miller coupling effect.

 

[h_vogt]

Thnx,

your current circuit has transistors with L=5um and W=5um (default values). You may consider changing these to real values.

Holger

 

[Kholdstare]

Yeah, found the bug at last.

 

[ngspice.com]

For simple netlists like this, http://www.ngspice.com can be very helpful. This site allows you to run SPICE simulations from a web browser. There is also an example circuit similar to yours that may have helped to identify the problem that you were having.