Write boolean expression describing this circuit

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The discussion revolves around determining the boolean expression for a circuit from MIT's 6.002 course, concluding that the function f(A,B,C) can be simplified to F(A,B,C)=¬A+(¬B*C). Participants explore the implications of the output voltage V_OUT, noting that it is high when A=0 or when A=1, B=0, and C=1. The conversation also addresses the concept of "load" on the OUT pin, which refers to any connected component that allows current to flow, and "leakage," indicating a small, often negligible current that flows when transistors are not fully off. Understanding these concepts is crucial for accurately assessing voltage levels in logic circuits.
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Homework Statement
We are asked to write a boolean expression that describes the function of the circuit below.
Relevant Equations
We can solve this problem by inspection. (The alternative is to go through a truth table of A, B, and C and figure out the corresponding values for $V_{OUT}$ and then write out the desired function).
This problem is from a problem set in the course 6.002 "Circuits and Electronics" of MIT OCW. There are no solutions, unfortunately.
1701202581816.png

By inspection, we can see that the voltage ##V_{OUT}## at terminal OUT in the picture above is high when

1) ##A=0##, because this leaves an open circuit between OUT and ground.

OR

2) ##A=1## and ##B=0## and ##C=1##, because though there is a short circuit at A, the circuit is open below A.

Thus, the function ##f(A,B,C)=\bar{A}+(A\bar{B}C)## represents the voltage at OUT.

We can simplify this to ##F(A,B,C)=\bar{A}+(\bar{B}C)##.

Is this correct?

One additional question: I simply mentioned that the output voltage is "high".

When this is the case, what is ##V_{OUT}## exactly?

It seems that this voltage should be a function of ##V_S## and the resistance ##R_6##.

I have a difficult time with this part. We don't know what is connected at the terminals of this circuit. If there were no ##R_6##, then ##V_{OUT}=V_S##. But due to the resistor, there seems to be a voltage difference.

If there is nothing connected at OUT, then what is the voltage there?

Suppose we connect OUT to some known voltage ##V##. Then ##V_{OUT}=V## and the current flowing through ##R_6## is determined (and it could flow either way depending on the potential difference ##V_S-V_{OUT}##.

In any case, it seems that the potential at OUT will be high relative to ground, which seems to be the most important thing. But again, how do I know the exact magnitude of the voltage at OUT?
 
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In logic circuits the "High"/"Low" naming is often called "True"/"False".

Generally speaking, outputs often are referred to with the "High"/"Low" naming, and "True"/"False" often refer to inputs. This is not a hard and fast rule, just seems to be a bit more common.

If you have seen a data sheet for logic gates, you may have noticed that the voltage ranges that define a True or False input are narrower (more restrictive) than the voltage ranges for the High and Low outputs.

Since the inputs of CMOS logic are very high impedance, essentially an open circuit, from a DC standpoint they are essentiall no load at all.

When A=0 and essentially no load on the OUT pin, there will be no current flow thru R6 and no voltage drop across it; causing the output voltage to be High, VS.
(Well almost VS, in the real world there will probably be a few microamps or nanoamps leakage thru the transistors, the circuit board, and whatever is connected to OUT.)

R6 is still needed though to limit current thru the transistors when the output should be Low.

I agree with your logic equations. Good Work!

Cheers,
Tom
 
When you say "load" on the OUT pin, what does this mean exactly?

I imagine it means some finite resistance together with a path to the ground (so that we have a closed circuit).

When you say there is "leakage", what does this mean exactly?

I imagine it means that in fact there is a load in places where we expect there not to be any (such as the OUT pin). When this happens, since current is flowing through R6 then we must have a potential difference between ##V_S## and voltage at OUT.

Is this correct?
 
zenterix said:
When you say "load" on the OUT pin, what does this mean exactly?
Like if you were going to directly drive an LED with the output (not recommended for logic gates -- you generally want to put a buffer circuit in the path to drive an LED).

zenterix said:
When you say there is "leakage", what does this mean exactly?
Leakage in this context refers to the fact that the gate transistors do not turn all the way OFF -- there is still a small leakage current that depends on the logic family, temperature, etc.

Have a look at some typical datasheets for CMOS logic gates to see how the input/output characteristics vary, including input and output logic voltage levels. Start with 74HC00, 74VHC00, 74AC00, 74HCT00, CD4011... :smile:
 
zenterix said:
When you say "load" on the OUT pin, what does this mean exactly?
Anything connected to the OUT pin that allows a current to flow through it.
zenterix said:
When you say there is "leakage", what does this mean exactly?
"Leakage" is when a current, usually quite small, flows (mostly) unexpectedly. This usually refers to a current so small that it can be, and usually is, ignored.
An example: a water faucet is turned off and some small amount of water continues to drip out; a "leaky faucet." (Those can sometimes keep you awake at night!)

Cheers,
Tom
 
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