Computer Architecture related questions

AI Thread Summary
The discussion revolves around specific questions related to computer architecture, particularly focusing on AVR RISC architecture and its instruction handling, memory-mapped I/O, stack implementation, and multiplication techniques. Participants seek clarification on how many memory accesses are needed to retrieve a full instruction word, the implications of memory-mapped I/O, and methods to implement additional stacks. There is also a query about how to perform multiplication without a dedicated instruction, with a suggestion that "shift and add" is a viable approach. The thread emphasizes the importance of reviewing course materials and provides hints for deeper understanding.
atlbraves49
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I have a set of questions that won't be graded, but that my prof. wants us to look into/review. I've figured most of them out but the following have given me some issues. Any help would be appreciated. I don't mind getting the answers but a brief explanation would be best. Thanks!

1) The AVR RISC architecture is an 8bit architec. but has a 16bit fixed length instruction word. If the latter is transferred to the Instruction Register via a CPU internal bus, how many program memory accesses are necessary to retrieve a full instruction word?
(3, 4, 1, or 2)



2) If I/O peripheral devices are memory mapped, this means that:
a) I/O is performed using the same instruction as for reading or writing to the data memory
b) The instruction set implements two special instructions: IN and OUT.
c) I/O peripherals cannot be memory mapped because the architecture is Harvard
d) Peripherals have addresses in the program memory space



3) The architecture has a build in stack pointer. If one needs Two stacks, the second one could be implemented:
a) using one of the registers in the Data-Bank to point to the TOS of the second stack.
b) using the same stack pointer for both stacks
c)the second stack cannot be implemented
d) Using the program counter to point to the TOS of the second stack



4) If an architecture lacks an integer-multiply instruction, this could be implemented using a sequence of:
a) Shift and subtract
b) Shift and add
c) shift and rotate
d) increment and accumulate instructions
 
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give us the answers you think are correct and why and we will critique them...
 
thats the thing, I am comfortable with the rest of the questions but these have me completely lost. I am not sure which are correct, that's why I am looking for some direction.

The only one i think i might know is #4.. i would say b) shift and add because that seems like a typical way to multiply in architecture if you don't have a multiply function.
 
still need help with these
 
You should review your course notes and/or read the textbook. In lieu of that, some guiding pointers (hardy har har):

1) HINT: How wide is your data bus? If you did have to do multiple transfers, would you need to transfer anything on the data bus in between transfers? What's the influence on the address bus?

2) Memory-mapped I/O:
http://en.wikipedia.org/wiki/Memory-mapped_I/O

3) Stack structure:
http://en.wikipedia.org/wiki/Stack_(data_structure)#Basic_architecture_of_a_stack

4) What happens to a binary number when you multiply by 2? 2^2=4? 2^3=8? How would you break down a number into powers of 2? Is this easier in binary?
 
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