Fermi level de-pinning & Schottky barrier

In summary, Fermi level de-pinning is a phenomenon where the Fermi level at the interface between a semiconductor and a metal is shifted, leading to changes in the Schottky barrier height. The Schottky barrier height is affected because the Fermi level determines the energy barrier for electron transfer. Factors such as the work function of the metal, the band gap of the semiconductor, and the nature of the interface can influence Fermi level de-pinning. This can have both positive and negative effects on device performance, but it can be controlled through methods such as surface treatments and doping techniques to optimize performance.
  • #1
SMOF
75
0
Hello.

I was womdering does anyone know any good resources of information on Fermi level de-pinning & Schottky barriers?

I have been hunting around online, with not much luck. I thought someone here might be able to suggest some things.

Thanks.

Seán
 
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  • #2
There are many semiconductor physics book for that. I read a good book but just happen to forget the name. Have you tried S. M. Sze?
 
  • #3
Read this book, "Physics of semiconductor devices", S. M. Sze, Kwok Kwok Ng, John Wiley and Sons.
 

Related to Fermi level de-pinning & Schottky barrier

1. What is Fermi level de-pinning?

Fermi level de-pinning refers to the phenomenon where the Fermi level of a semiconductor material at an interface with a metal is shifted, resulting in a change in the Schottky barrier height. This can occur due to differences in work function between the semiconductor and metal, and can have implications for the performance of electronic devices.

2. How is the Schottky barrier height affected by Fermi level de-pinning?

The Schottky barrier height is affected by Fermi level de-pinning because the Fermi level determines the energy level at which electrons can flow between the semiconductor and metal. A shift in the Fermi level can result in a change in the energy barrier for electron transfer, thus affecting the Schottky barrier height.

3. What factors can influence Fermi level de-pinning?

Several factors can influence Fermi level de-pinning, including the work function of the metal, the band gap of the semiconductor material, and the nature of the interface between the two materials. Other factors such as surface states and dopant concentrations can also play a role.

4. How does Fermi level de-pinning affect device performance?

Fermi level de-pinning can have both positive and negative effects on device performance. On one hand, it can lead to improved carrier injection and higher electron mobility, which can enhance device performance. On the other hand, it can also result in increased leakage currents and decreased device reliability.

5. Can Fermi level de-pinning be controlled?

Yes, Fermi level de-pinning can be controlled through various methods such as surface treatments, interfacial layers, and doping techniques. These methods can be used to manipulate the interface properties and adjust the Fermi level to optimize device performance.

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