Register to reply 
Full Adder modified to make Full Subtractor 
Share this thread: 
#1
Apr1612, 06:20 AM

P: 63

If I was to make a modification to an 8 bit full adder to make it a an eight bit full subtractor would I put an inverter at the carry in input for the first full adder and then an inverter on one of each of the two inputs going in to each adder. eg an inverter on A3, A2, A1, A0 and leave B3, B2, B1, B0 alone? (Where 0=add, 1=subtract).
Thanks for your help. Matt 


#2
Apr1612, 06:50 AM

Sci Advisor
PF Gold
P: 1,781

Let's see, if A and B are bit vectors A+B = A xor B + 2* A and B.
With a carry input you add it in: A+B w/C = A xor B + 2*A and B + Cin. Overflow in the 2nd addition is the carry output. A = not A +1, (two's complement)[edited] BA = Not A + B + 1 = not A xor B + 2* not A and B + 1 Invert A yes. I'm not clear on the role of carry input for subtraction. It is a borrow, right? So it represents a 1 from the lower word and the output carry will represent a 2^4 to be borrowed from the higher bits or in the end a negative flag. So yes I think you have it right: B  A w/C = not A xor B + 2*(not A and B) + (1C) 1C = not C since this is a 1bit term. (I'm working this out using bitwise boolean operations.) It's been a while since I played with machine level arithmetic. What I suggest is that you work through, bit by bit a few examples and see if the result is as you expect. 


#3
Apr1612, 09:45 AM

P: 2,251

it's simple. say you have a full adder, where the carryout bit of one added bit goes into the carryin bit if the added bit that is adjacent and more significant. for the LSB, the carry in is set to 0 for simple adding, and you set it to 1 for simple subtraction. you can make the same adder work for adding and subtracting by putting XOR gates in front of the B input bits and the same line (called the "M" input in the diagram cited) that goes into the other input of the XOR gate (that when set to 1, it complements all of the bits going into the B input) that same line goes into the carryin of the least significant bit to be that added "1" when doing the two's complement. so it's 0 for add and 1 for subtract. there's a simple diagram at: http://implementlogic.blogspot.com/...ubtractor.html and to fill in the FA block, use: http://en.wikipedia.org/wiki/File:Full_Adder.svg 


Register to reply 
Related Discussions  
Full Adder Circuit help  Engineering, Comp Sci, & Technology Homework  1  
Logic design  Full subtractor question  need help  Engineering, Comp Sci, & Technology Homework  1  
How does a full subtractor work?  Engineering, Comp Sci, & Technology Homework  1  
Full adder using decoder?  Electrical Engineering  1 