Can Two 8-bit Adders Be Used to Construct a 16-bit 2's Complement Adder?

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In summary, the conversation discusses the creation of a 16-bit 2's complement adder using two 8-bit adders with 1-bit carry inputs. The adders are able to calculate the sum of two 8-bit operands and output an 8-bit sum and a 1-bit 2's complement overflow bit. The possibility of using the two adders to create a 16-bit adder is explored, with the suggestion to draw and wire the adders as boxes with clearly labeled inputs and outputs. A hint is also provided, discussing the role of the carry input and the impact on the 10s and 1s place when adding numbers with different values.
  • #1
rgalvan2
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16 bit 2's complement adder. Due tomorrow!

You are given two adders. Each adder has two 8-bit operand inputs
and a 1-bit carry input. Each adder calculates the sum of the two
8-bit 2's complement operands and the 1-bit carry and outputs an 8-bit
sum and a 1-bit 2's complement overflow bit. Can you use the two
adders to create a 16-bit 2's complement adder? If so, draw it (represent
the adders as boxes with clearly labeled inputs and outputs). If not,
explain why it is difficult.

Help please
 
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  • #2


Yes. The drawing and wiring are left as an exercise to the student :-)

HINT:
1) What happens to the 10s place when you add 15 and 27? What happened to the 1s place?
2) What is the purpose of the carry INPUT?
 
  • #3


Yes, it is possible to use the two adders to create a 16-bit 2's complement adder. This can be achieved by cascading the two 8-bit adders together. The first adder will take the first 8 bits of the operands and the carry input, while the second adder will take the remaining 8 bits and the overflow bit from the first adder as the carry input. The output will be a 16-bit sum and a 1-bit overflow bit, which represents the 2's complement of the sum.

I have attached a diagram of the 16-bit 2's complement adder using the two 8-bit adders. Each box represents an 8-bit adder with clearly labeled inputs and outputs. The first adder takes in the first 8 bits of the operands (A0-A7) and the carry input (C0) and outputs an 8-bit sum (S0-S7) and an overflow bit (V0). The second adder takes in the remaining 8 bits of the operands (A8-A15) and the overflow bit (V0) from the first adder as the carry input (C1) and outputs the final 16-bit sum (S0-S15) and the overflow bit (V1).

It is not difficult to create a 16-bit 2's complement adder using these two 8-bit adders. However, it is important to note that this may not be the most efficient or optimal solution. There are other methods and circuits that can be used to create a 16-bit 2's complement adder with fewer components. It is always important to consider the trade-offs between complexity, cost, and performance when designing a circuit.
 

1. What is a 16 bit 2's complement adder?

A 16 bit 2's complement adder is a digital circuit used in computer systems to perform addition operations on binary numbers. It takes two 16-bit binary numbers as input and produces a 16-bit binary number as output.

2. Why is 2's complement used in a 16 bit adder?

2's complement is used in a 16 bit adder because it allows for both positive and negative numbers to be represented with the same number of bits. This is important for performing addition operations on signed numbers in a computer system.

3. How does a 16 bit 2's complement adder work?

A 16 bit 2's complement adder works by using a series of logic gates to perform bit-wise addition on the two input numbers. The carry from each bit addition is propagated to the next bit until all 16 bits have been added, resulting in a final output.

4. What is the purpose of a 16 bit 2's complement adder?

The purpose of a 16 bit 2's complement adder is to perform addition operations on binary numbers in a computer system. It is commonly used in arithmetic logic units (ALUs) to perform mathematical calculations and in other digital circuits that require addition operations.

5. How is overflow handled in a 16 bit 2's complement adder?

Overflow in a 16 bit 2's complement adder occurs when the result of the addition operation exceeds the range of numbers that can be represented with 16 bits. This is handled by discarding the extra bit and the result will be the equivalent of performing the operation on a smaller bit size, resulting in an incorrect output.

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