Designing a Counter for 0-5-2-7-4-1-6-3-0 Using Gates and T-Flip Flops

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To design a counter that counts 0->5->2->7->4->1->6->3->0 using T-flip flops and gates, start by creating a state table for the desired sequence. Treat the counter as an n-bit state machine and assign the specific states to the corresponding numbers. Refer to Rafi's book for a similar example that outlines the necessary steps. The next phase involves determining the flip-flop inputs and minimizing the gate configuration. Following these guidelines will lead to a successful design of the counter.
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hi,

can someone give me hints on how to design a counter that counts
0->5->2->7->4->1->6->3->0 using T-flip flop and some gates? I've been looking at this problem but i don't know where to start...

thanks

vinh
 
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look in rafi's book. There is an example that is very similar to this question. Just follow the steps and the answer will come out. No thinking neccessary.

Start by drawing a state table of the counter then find ff input.
 
Don't think of it as a counter, think of it as an n-bit state machine. Then, just assign the states to the numbers you want. The rest is just minimization or consistency (whatever your preference) of gates (assuming you're just going to use those 14 pin gate packages).
 
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