MIPS Pipelining Help: Filling the Timeline w/ & w/o Forwarding

  • Thread starter jdoe10
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In general, however, I recommend that you make sure to always label your axes and put a legend on your graphs. That way, there's no confusion about what is being depicted.In summary, the conversation discusses the assembly code "LW R1, 0(R2)" and the dependencies and pipelining timeline associated with it, with and without forwarding. The attempt at a solution includes labeled timelines for both scenarios. It is recommended to label axes and include a legend for clarity.
  • #1
jdoe10
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Homework Statement


Assembly Code:
LW R1, 0(R2)
add R4, R3, R1
add R3, R1, R4
What are the dependencies
Fill the pipelining timeline if:
a. There is forwarding
b. There is no forwarding

Homework Equations


N/A

The Attempt at a Solution


With forwarding attempt:
A7YtB.png

Without forwarding attempt:
9l320.png

Am I filling the pipelining timeline correctly?
 
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  • #2
jdoe10 said:

Homework Statement


Assembly Code:
LW R1, 0(R2)
add R4, R3, R1
add R3, R1, R4
What are the dependencies
Fill the pipelining timeline if:
a. There is forwarding
b. There is no forwarding

Homework Equations


N/A

The Attempt at a Solution


With forwarding attempt:
A7YtB.png

Without forwarding attempt:
9l320.png

Am I filling the pipelining timeline correctly?
Are you working from a textbook? There are only two that I am aware of: "MIPS Assembly Langauge Programming," by Robert Britton, and "Computer Organization and Design: The Hardware/Software Interface," by Patterson and Hennessey. Chapter 10 in the Britton book, which I have, discusses pipelined implementations. I don't have the other book, so can't comment on it.
As far as your question, I'm in the process of learning MIPS programming, but I'm not up to speed on the forwarding business just yet.
 

What is MIPS pipelining?

MIPS pipelining is a technique used in computer architecture to improve the performance of the processor by allowing multiple instructions to be executed simultaneously. It divides the execution of instructions into stages, with each stage handling a specific task, resulting in a faster overall execution time.

How does pipelining help fill the timeline?

Pipelining helps fill the timeline by breaking down instructions into smaller stages and allowing them to overlap. This means that while one instruction is in the execution stage, another instruction can enter the decode stage, and so on. This allows for multiple instructions to be in different stages of execution at the same time, resulting in a more efficient use of the processor's resources.

What is forwarding in pipelining?

Forwarding, also known as data forwarding or bypassing, is a technique used in pipelining to reduce the number of pipeline stalls. It allows data to be transferred directly from one stage of the pipeline to another, without having to wait for it to be written back to memory. This helps to avoid delays and improve the overall performance of the pipeline.

What are the benefits of using forwarding in pipelining?

The main benefit of using forwarding in pipelining is a reduction in pipeline stalls. This means that instructions can be executed faster, resulting in a higher overall performance. Forwarding also helps to reduce the need for additional hardware resources, such as registers, which can save on costs.

What challenges can arise when implementing pipelining with forwarding?

One of the main challenges of implementing pipelining with forwarding is the increased complexity of the hardware. The hardware must be able to track and forward data correctly, which can be difficult to design and test. Additionally, forwarding can also introduce the possibility of data hazards, where the data being forwarded is not the most up-to-date, resulting in incorrect execution of instructions.

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