I'm trying to intuit how pull-up and pull-down resistors work

[s3a]

TL;DR

My understanding:
Pull-up resistor:
* Logic high when switch is open
* Logic low when switch is closed

Pull-down resistor:
* Logic low when switch is open
* Logic high when switch is closed

My goal:
I'm trying to intuit what happens in each arrangement when the switch is on and when it's off.

For the attached image (from https://en.wikipedia.org/wiki/Pull-up_resistor), could someone please help me intuit what happens in each arrangement when the switch is on and when it's off?

So, apparently the pull-up or pull-down resistor is chosen optimally so as to be too low to significantly interfere with the switching device's impedance (as I think can be seen with the voltage divider law), but high enough to prevent a fluctuating voltage when the switch is open.

Also, what is this "to digital input" part exactly? Should I just treat that as a point at which to analyze the potential difference / voltage?

When the switch is closed, is there only one possible logic value for the voltage (assuming proper operation), which would be the opposite of the logical value exhibited when the switch is open or can it be either of the two logic values with the constant and predictable logic value only being the case when the switch is open?

Also, when the switch is open, for both pull-up and pull-down cases, is the reason for the stability because the resistor "pushes" the electrons in the (one) opposite direction, thereby creating certainty?

As you can probably see, I am very confused, so if someone could please help clarify things for me, I would greatly appreciate it!

P.S.
I can also give more information if necessary, so please let me know if you feel something's missing (even if you don't plan to be the one to actually answer my question(s)).

P.P.S.
I included a png version of the svg from Wikipedia for convenience, but the svg is also attached here.

 

[Baluncore]

Just some words of warning. Trying to intuit resistors in digital circuits is going to make your life interesting, sometimes even exciting. There are speed bumps, expect them when you least expect them.

You are only thinking in terms of voltage dividers, with binary logic inputs, that sense voltage, such as CMOS.

Those resistors, to ground or supply rails, also terminate the transmission line impedance, lines that route signals across and between the circuit boards. The termination resistors look like pull-up resistors, but are selected to prevent signal reflections, which would make operation slow and unreliable. Line termination resistors, like the impedance of the lines they terminate, typically have values between 50 and 1k ohms.

There are legacy technologies, such as TTL, that employ current switching logic, not voltage, so voltage is only of secondary interest. With TTL, unused inputs use less supply current when they are tied to the logic high, +5V rail, through a 1k pull-up resistor. That resistor appears initially to be redundant, but it prevents subtle damage to the inputs if the +5V supply spikes momentarily, by a couple of volts. TTL inputs source conventional current to the output that controls them, which at first seems backwards. TTL can also use open-collector logic, with one pull-up resistor, to perform a wired-OR, in negative logic.

There are also current signalling technologies that go beyond TTL, such as I²L, (Integrated Injection Logic). There, logic gates have only one input terminal, but many separate outputs, so the logic is actually performed by wired-OR connections. I²L can operate on a 1V supply, consuming only micro-amps, while baffling any engineer trained only to think in terms of signal voltage.
https://en.wikipedia.org/wiki/Integrated_injection_logic

 

[berkeman]

Also, what is this "to digital input" part exactly? Should I just treat that as a point at which to analyze the potential difference / voltage?

Pullup/pulldown resistors and switches are commonly used as inputs to digital logic gates or other digital logic like microcontrollers (uCs). They are used to create high(1)/low(0) logic inputs to those subsequent circuits:

https://learn.sparkfun.com/tutorials/pull-up-resistors/all

If the input impedance of the subsequent logic gate is very high, like with CMOS logic, then you don't have to worry much about voltage divider considerations. If the input impedance is not high (and you have source currents coming from those logic inputs like in the old TTL days), then you do have to pay more attention to the value of the resistors.

 

[s3a]

To Baluncore:
My confusion was far more basic than that, but thanks anyway. For one, I didn't know TTL was the old stuff and CMOS the new. I did see the word CMOS in a textbook that I will eventually read when my knowledge level rises sufficiently.

To both (Baluncore and berkeman):
Having said that, firstly, I guess the microcontroller being directly connected to GND is a logic 0 and directly connected to VCC is a logic 1, but adding things to that basic scenario confuses me.

In the pull-up resistor case, while the micro-controller has a much higher resistance than R_1 of the diagram berkeman showed, is a reason for having R_1 that not having R_1 could damage an input part of it / the micro-controller (to attempt to reiterate part of what Baluncore said in my own words)? That doesn't seem to me to be the reason Wikipedia has given (among other sources); Wikipedia says that the voltage is undefined. Is the indefinition caused by frequent-but-non-consistent current and voltage spikes, and if so, is that mostly from causes like induction from surrounding entities?

That would only explain the open-switch case, though. When the switch is closed, I can see how more current would go from GND to MCU than to R_1 because of the resistance of MCU far exceeding R_1's, but I don't see how VCC and GND affect the input pin. I feel like the voltage at the pin should be (VCC - GND), but then that behaviour seems no different to me than when the switch is open. The behaviour when closing the switch should be the opposite logical value of when the switch is open, right?

 

[berkeman]

In the pull-up resistor case, while the micro-controller has a much higher resistance than R_1 of the diagram berkeman showed, is a reason for having R_1 that not having R_1 could damage an input part of it / the micro-controller (to attempt to reiterate part of what Baluncore said in my own words)?

There are a couple reasons for using the "single pole / single throw" SPST switch and resistor versus a "single pole / double throw" SPDT switch (where you connect the two throw pins to Vcc and GND). First, the latter switch is a little more expensive than the former switch (even including the cost of the resistor), and second, with the SPDT switch it needs to be the "break before make" type, so it does not short Vcc to GND when being flipped. So that means there is a time window during the flipping of the switch where the connection to the following logic gate is floating, which is a bad thing for most types of logic.

If you leave a CMOS logic input floating for any amount of time, it can cause oscillations in the logic gate and its output, or it can allow the gate to float to a middle voltage value at its input and output, and that is a high current consumption state (much higher than normal saturated operation).

All of that may be TMI for you at this stage in your learning, but just come back and re-read it occasionally as you get farther in your learning about digital logic. It will make more sense as time goes on.

 

[JT Smith]

In the pull-up resistor case, while the micro-controller has a much higher resistance than R_1 of the diagram berkeman showed, is a reason for having R_1 that not having R_1 could damage an input part of it / the micro-controller (to attempt to reiterate part of what Baluncore said in my own words)?

You can connect a microprocessor input directly to VCC or GND without worries as the impedance is very high. You need that resistor so that when the switch is closed you aren't shorting VCC to GND. Your power supply wouldn't like that.

FWIW, some microprocessors have an internal pull-up resistor you can select programmatically. It's nice as it's simpler (no external resistor needed). You just wire the switch in between ground and the input pin.

 

[s3a]

Thanks for your responses and sorry for my late one.

It will probably seem trivial to you guys, but this (Reddit) post explains and solves my biggest confusion.:


Namely, "What I don't get, is when the button is pressed down. Now, the voltage from the pull-up resistor can go either to ground, or into the input pin, but it always goes to ground, so the arduino reads a 0. Why?" and the answer to it I referenced with the link above.

Just another, I suppose, stupid question: Does the GND to the left and below BUTTON and the GND to the right and below MCU's input pin connect to each other if one further draws the circuit (since I suppose they are the same GND by necessity and not just convenience), such that input pin has both endpoints touching (assuming wire with zero resistance) the bottom endpoint of R1? If so, does that have any significance?

 

[Averagesupernova]

I hate the term "army wavy" but that seems to be what you're doing. Learn some actual circuit analysis. Kirchoff's law, ohms law, etc. Arm waving in this scenario works fine in a conversation between two people who understand the math and circuit analysis. You aren't there yet. The terms pull-up and pull-down are quite arm wavy in my opinion but they are accepted because this circuit is well understood. No need to recite the math each time this circuit pops up.

 

[s3a]

Actually, I realized that that explanation I gave doesn't address the voltages, so that logic wouldn't be good enough for at least CMOS technology.

I know about Ohm's and Kirchoff's laws.

In the following image, when BUTTON is pressed, are R1, VCC and input pin in series with the GNDs connecting such that this is all just a single loop?:

When BUTTON is not pressed, it seems to be a line (not a loop) that goes from VCC to GND, which I guess still works, despite not being some set of loops.

If it's in series, the voltage divider concept would explain things, it seems.

 

[Averagesupernova]

I know about Ohm's and Kirchoff's laws.

I really have to wonder.

 

[Averagesupernova]

When the switch is closed you have a zero ohm resistor in parallel with R2. When the switch is open you have a resistor of infinite ohms in parallel with R2. Do you know how to solve for the total resistance of those parallel resistors?

 

[s3a]

So, I find Req at the pin?

Switch open:
Req = 1 / (1/Rs + 1/R2)
Req = 1 / (1/INF + 1/R2)
Req = 1 / (0 + 1/R2)
Req = R2

Switch closed:
Req = 1 / (1/Rs + 1/R2)
Req = 1 / (1/0 + 1/R2)
Req = 1 / (INF + 1/R2)
Req = 1 / (INF)
Req = 0

 

[Averagesupernova]

Do you know how to apply the results you got to determine what the voltage will be on the pin in each case?

 

[s3a]

Switch closed:
V = R*I
V = 0*I
V = 0 (logic low)

Switch open:
V = R*I
V = (R1+R2)*I (logic high since R1+R2 is a finite resistance so the voltage source can provide however much current is needed?)

So, is the key to recognize the wire of the switch and the resistance of the MCU (R2) as being in parallel, and that that's the case because multiple mentions of "GND" in a circuit refer to the same GND?

Assuming that is the case and to save some back-and-forth, here is what I get for the pull-down resistor case.:

The first step is to notice that he pull-down resistance and the digital input's resistance are in parallel (because they both connect to GND). Then, that Req1 is in series with the switch's resistance.

So,
Req1 = 1 / (1/Rdi + 1/Rpd).

Then,
Req2 = 1 / (1/Rs + 1/Req1)

Switch closed:
Req2 = Rs + Req1
Req2 = 0 + Req1
Req2 = Req1

V = Req1 * I (logic high since R1+R2 is a finite resistance so the voltage source can provide however much current is needed?)

Switch open:
Req2 = INF + Req1
Req2 = INF

V = R*I
V = Req2*I
V = (INF+Req1)*I
V = INF*I
V = INF (I'm not sure what to make of this result.)

Am I doing something wrong?

 

[Averagesupernova]

The part you do have correct is that GND = GND = GND.
-
What is Req1 and Req2? Equivalent? Why would you have an Req1? R1 is always in series with the rest of the circuit. Why do have an infinite equivalent resistance of the open switch in parallel series with a finite resistance? That is wrong.
-

V = (INF+Req1)*I

 

[s3a]

Okay, good to have the GND thing confirmed.

As for the other part, I am using the diagram with the pull-down resistor from the image below (obtained from Wikipedia) (so, not the other image that was from the link that berkeman had given (and so I am not making any reference to R1 nor R2 from there - sorry for the confusion)).:

I'm focusing on the node that is the black dot in the middle where the switching device, digital input and pull-down resistor connect, and I'm saying that the digital input's resistance, when combined (using the parallel formula) with the pull-down resistor's resistance, is the first equivalent resistance at the black-dot node, Req1. Then, Req1 and the switching device's resistance are in series, and I combine those (using the series formula) to get the second equivalent resistance at the black-dot node. That then results with VCC at the top, Req2 in the middle and VSS at the bottom.

di: digital input
pd: pull-down resistor
s: switch

I'm saying that Rdi and Rpd are connected in parallel because I'm assuming that the digital input is connected to VSS, as is the pull-down resistor.

Then, when one gets the equivalent resistance of those two, that's like one resistor on the black dot, directly below the switching device.

Then, for the pull-down resistor situation,

Req1 = 1 / (1/Rdi + 1/Rpd)

Req2 = Rs + Req1

Switch closed:
Req2 = 0 + Req1
Req2 = Req1

Switch open:
Req2 = INF + Req1
Req2 = INF

Assuming that that's right, how should I interpret that? As needing an infinite voltage because of there being no current and so being a logic low? Or is it another logic high? Is the interpretation something else entirely?

 

[Averagesupernova]

Hint: You always have an infinite number of infinite resistances in parallel with the open switch. You have that even with no switch. If a switch is open, it is the same as it not being there. How could that be anything but a logic zero with a pull-down?

 

[s3a]

Oh. :P I was trying to do what I thought you said and wasn't thinking in a real-life way. So, it's basically Req2 = Req1 in both cases, but when the switch is open, there is no voltage source powering anything and that's what makes the difference, right?

So, generally speaking, is the "trick" to understand pull-up and pull-down resistor stuff essentially, when there is a voltage source (depending on whether the switch is open or closed), to find the equivalent resistance at the common point of any branching out and then use that to find the voltage, which is then equal in both "pre-equivalent" branches (because of how voltage naturally works in parallel branches) and is also what matters for the logic levels (at least in a general, non-exceptional situation)?

 

[Averagesupernova]

I never realized it was so difficult to understand. Yes, you could say that there is no voltage source powering anything. Suppose you have a work bench with a metal top. Solder one lead of a resistor to the bench top. Then set a double A battery (cell technically) next to it with the negative end resting on the metal top of the bench. Would you expect to measure a voltage across the resistor?

 

[s3a]

Sorry, I'm probably just slow. :P :(

So, the resistor has one end attached to the table top, but the other end is not attached to anything?

Also, the AA "battery"/cell is attached to the aforementioned resistor end via the table?

If so, ignoring magnetic fields from nearby stuff, I'd say the voltage would be zero because voltage is a difference of potentials that incites the charged particles to move and there is no different potential, just the one from the AA "battery"/cell.

I sense you're trying to make a point, but I'm not sure what it is. Does it have something to do with the switch being closed and that needing to be the case for the current to flow because otherwise there would not be two or more differing potentials in the circuit? Or, is it because of my "that's what makes the difference" comment?

 

[Averagesupernova]

The circuits are the same. You get the one with the metal tabletop correct but for some reason cannot understand the other.

 

[s3a]

Are you talking about the pull-up-resistor case (and not the pull-down-resistor one)?

If so, looking at the Wikipedia diagram for it, the table situation you described seems to me to be like that but without the "to digital input" branch-out, which has its own ground and parallelizes things.

But, re-looking at things, it seems to me that, for the pull-up-resistor case, when the switch is open, it's just VCC being applied to the (series) sum of the pull-up resistor's resistance and the digital input's resistance toward the GND in the MCU or whatever of the aforementioned digital input, yielding a logic 1 (at the digital input). When the switch is closed, the fact that their GND is shared (if I understood what you had said previously correctly), it seems to me that the digital input would be bypassed (would it be correct to replace the word "bypassed" with "shorted" if the pull-up resistor is preventing an abundance of current from reaching the node that connects the digital input to the switch to begin with?) and that does seem to align with the R = 0 computation from before, yielding a logic 0 (at the digital input).

In the pull-down-resistor case, when the switch is open, the potential at the digital input pin and VSS are both zero, so their potential difference is also zero and that gives a logic 0 (at the digital input). When the switch is closed, the voltage at the non-ground node which connects the digital input to the pull-down resistor has the same voltage for each of those two things since the GND is shared (if I understood what you had said previously correctly), which gives a logic 1 (at the digital input).

And, lastly, the benefit of the pull-up and pull-down resistor is that they prevent the digital input from being shorted, right?

Ignoring my difficulty with relating the table stuff to the, I'm assuming, pull-up-resistor case, do you think that I now get the pull-up- and pull-down-resistor stuff based on what I said most recently, in this post?

 

[Averagesupernova]

A pull down resistor has one lead grounded. The table top example I gave is using a pull down resistor.
-

And, lastly, the benefit of the pull-up and pull-down resistor is that they prevent the digital input from being shorted, right?

The benefit of the pull up or pull down resistor is that if there is nothing else attached to IC lead besides the resistor it is tied to a logical something. Either high or low and not floating. This of course gives us the flexibility then to use a simpler switch such as the SPST (Single Pole Single Throw). I'm not sure what you mean by the input being shorted. Shorted to what and under what circumstances?
-

...do you think that I now get the pull-up- and pull-down-resistor stuff based on what I said most recently, in this post?

Since you think the table top example is using the resistor as a pull up, then no, you definitely don't get it. You say you understand kirchoff's laws, ohms law, etc. You obviously don't.

But, re-looking at things, it seems to me that, for the pull-up-resistor case, when the switch is open, it's just VCC being applied to the (series) sum of the pull-up resistor's resistance and the digital input's resistance toward the GND in the MCU or whatever of the aforementioned digital input, yielding a logic 1 (at the digital input). When the switch is closed, the fact that their GND is shared (if I understood what you had said previously correctly), it seems to me that the digital input would be bypassed (would it be correct to replace the word "bypassed" with "shorted" if the pull-up resistor is preventing an abundance of current from reaching the node that connects the digital input to the switch to begin with?) and that does seem to align with the R = 0 computation from before, yielding a logic 0 (at the digital input).

Based on the italics I can see you are not grasping basic circuit analysis. Shorting, (the word bypassing isn't completely incorrect) the digital input will cause a logical low on the IC input. How can it not? Can you expect a voltmeter to read when the leads are placed on a piece of wire an inch apart from each other? Of course not. The pull-up resistor in the above quote prevents excessive current from flowing through the switch when it is closed. The part that I bolded is not really correct terminology. The current doesn't "reach the node" so much as it flows through the node, pull-up resistor and closed switch. The current is the supply voltage divided by the resistance in ohms of the pull up. This current is much higher than when the switch is open. You need to understand basic circuit analysis better than you do if you want to get a grasp on this.
-
Simply put, Kirchoff's voltage law states that a series of resistors wired to a voltage source must divide up the voltage between them. You cannot have a 5 volt source and measure the voltage across all of the resistors individually and come up with a sum of the voltages that is not 5 volts. Apply this to the pull up and pull down examples. Your closed switch is a zero ohm resistor AKA a piece of wire.
-
Kirchoff's current states something similar except it is with currents in parallel circuits. So when two resistors are in parallel each one carries a portion of the total current. The current flowing in the switch in the pull down examples is the sum of the currents in the pull down resistor and internal resistance to ground in the IC (R2 in post #7).