What is Nand gate: Definition and 15 Discussions

In digital electronics, a NAND gate (NOT-AND) is a logic gate which produces an output which is false only if all its inputs are true; thus its output is complement to that of an AND gate. A LOW (0) output results only if all the inputs to the gate are HIGH (1); if any input is LOW (0), a HIGH (1) output results. A NAND gate is made using transistors and junction diodes. By De Morgan's laws, a two-input NAND gate's logic may be expressed as AB=A+B, making a NAND gate equivalent to inverters followed by an OR gate.
The NAND gate is significant because any boolean function can be implemented by using a combination of NAND gates. This property is called functional completeness. It shares this property with the NOR gate. Digital systems employing certain logic circuits take advantage of NAND's functional completeness.
The function NAND(a1, a2, ..., an) is logically equivalent to NOT(a1 AND a2 AND ... AND an).
One way of expressing A NAND B is




{\displaystyle {\overline {A\land B}}}
, where the symbol

{\displaystyle {\land }}
signifies AND and the bar signifies the negation of the expression under it: in essence, simply



{\displaystyle {\displaystyle \neg (A\land B)}}
NAND gates with two or more inputs are available as integrated circuits in transistor-transistor logic, CMOS, and other logic families.

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  2. C

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  3. moenste

    How can a NAND gate be used as a NOT gate?

    Homework Statement (a) The diagram represents a NAND gate with two inputs, T1 and T2, and an output X. Copy the truth table above and complete it. Show how a NAND gate can become a NOT gate. (b) Draw up a truth table for the combination of NAND gates shown above. 2. The attempt at a...
  4. dwn

    Constructing a NAND Gate as Inverter: Troubleshooting Needed

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  5. I

    MHB Creating an inverter from a 2 input NAND gate

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  6. S

    Standard TTL 2-input NAND gate - open-collector/totem pole outputs

    Homework Statement Question: Refer to Fig. 6-5. This standard TTL 2-input NAND gate uses ______ (open-collector, totem pole) outputs. Solution: The 2-input TTL NAND gate in Fig. 6-5 (which is attached as "TheFigure.jpg") uses a totem pole output configuration. Homework Equations N/A...
  7. Y

    How does a NAND gate work using transistors?

    http://www.dummies.com/how-to/content/electronics-projects-how-to-create-a-transistor-na.html In the above link it is said that the output is logic ON if both the inputs are OFF. What does that mean. Correct me if I am wrong. As far as I have learned from the site was when the input is ON...
  8. I

    3 input XOR gate using NAND gate only ( Logic )

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  9. N

    Implement ABC'D' using only one 2-input nand gate and one 3-input nor gate

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  10. D

    Pretty simple NAND gate question

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  11. T

    Draw C.(A(+)B)+ A.B Equation using Nand Gates

    1. Guys how can I draw this equation C.(A(+)B)+ A.B only using Nand gates? 3.I have minimized it but just don't know how to draw it only using Nand gates. Thanks.
  12. F

    Can a NAND gate be made without using a negative supply?

    If an AND gate is basically two switches in series, and an OR gate is two switches in parallel, how would you physicaly make a NAND/NOT/NOR gate? What is physically going on in the microchip which has these gates?
  13. C

    Is the implementation of the NAND gate unique?

    I am learning about the implementations of digital logic gates using n-type and p-type transistors. With the advent of these two transistors, isn't it possible to have more than one implementation of the NAND gate?
  14. D

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