Pretty simple NAND gate question

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Discussion Overview

The discussion revolves around the equivalence of two expressions involving NAND operations in digital logic, specifically focusing on the transformation of a given expression into a NAND-only circuit. Participants explore the definitions and implications of the NAND operator and its relation to other logical operations.

Discussion Character

  • Homework-related
  • Debate/contested
  • Technical explanation

Main Points Raised

  • One participant presents two expressions, x1↑(x2↑x2) and x2↑(x1↑x2), claiming they are not equal based on their truth table analysis.
  • Another participant requests clarification on the meaning of the NAND operator (↑) in the context of the expressions.
  • Several participants discuss the transformation of the expression x1\overline{x}2 + x2\overline{x}1 into a NAND-only circuit, with one participant asserting that they used decomposition to arrive at their answer.
  • One participant mentions that they received confirmation in class that the two expressions are equivalent, which raises questions about the accuracy of the book's answer.
  • Another participant expresses confusion regarding the definition of the NAND operator and its relation to XOR, referencing external sources for clarification.
  • There is a request for truth tables for the expressions to further clarify their equivalence, with one participant asserting that the expressions are not identical based on their evaluations.

Areas of Agreement / Disagreement

Participants do not reach a consensus on the equivalence of the two expressions. Some assert they are equivalent, while others argue they are not, leading to an unresolved discussion.

Contextual Notes

There are uncertainties regarding the definitions of the operators involved and the assumptions made in the truth table evaluations. The discussion highlights potential confusion stemming from the notation used in the source material.

DrummingAtom
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Homework Statement



I was looking through some examples in my Digital Logic book and I stumbled across one that gave an answer of x1[itex]\uparrow[/itex](x2[itex]\uparrow[/itex]x2). The answer I got was x2[itex]\uparrow[/itex](x1[itex]\uparrow[/itex]x2).

After making a truth table I'm finding that these are not equal solutions. Unless, I'm doing something wrong.

The Attempt at a Solution



See above. Any help is appreciated.
 
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DrummingAtom said:
x1[itex]\uparrow[/itex](x2[itex]\uparrow[/itex]x2).
Can you write this in words so I can see where NAND comes into it?
 
NascentOxygen said:
Can you write this in words so I can see where NAND comes into it?

The problem asked to turn x1[itex]\overline{x}[/itex]2 + x2[itex]\overline{x}[/itex]1 into a NAND only circuit. I used decomposition in the last steps to get my answer.
 
DrummingAtom said:
The problem asked to turn x1[itex]\overline{x}[/itex]2 + x2[itex]\overline{x}[/itex]1 into a NAND only circuit. I used decomposition in the last steps to get my answer.
Can you show the truth table for x1[itex]\overline{x}[/itex]2 + x2[itex]\overline{x}[/itex]1? I'm not sure the book answer is correct assuming that ↑ means NAND.
 
I got my question answered today in class. Those two solutions are equivalent. Thanks for the help though.
 
I'm somewhat confused by this. You never explained what ↑ means.

Isn't x1[itex]\overline{x}[/itex]2 + x2[itex]\overline{x}[/itex]1 the same as XOR? Wiki article for XOR implemented with NAND gates:

http://en.wikipedia.org/wiki/NAND_logic#XOR
 
According to my book, ↑, is a NAND gate operator.
 
OK, so again I ask what is the truth table for

x1[itex]\overline{x}[/itex]2 + x2[itex]\overline{x}[/itex]1

and the truth table for

x1↑(x2↑x2)

or

x2↑(x1↑x2)
 
DrummingAtom said:
According to my book, ↑, is a NAND gate operator.
But a poor choice, and bound to lead to confusion.
 
  • #10
rcgldr said:
OK, so again I ask what is the truth table for

x1[itex]\overline{x}[/itex]2 + x2[itex]\overline{x}[/itex]1
Yes, that is exclusive NOR.

and the truth table for

x1↑(x2↑x2)

or

x2↑(x1↑x2)

x2 NAND x2 is just NOT x2

x2↑(x1↑x2) evaluates to x2 NAND NOT x1

So expressions in post #1 are NOT identical.
 
Last edited:

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