Homework Help: What happens when you place a NOT gate before and after a NAND gate

1. Jul 12, 2010

1. The problem statement, all variables and given/known data
What happens when you place a NOT gate before and after a NAND gate

2. Relevant equations
Current Research(My own work):
NOT Gate: A NOT gate is also known as an inverter. It is a logic gate which implements a methodology best known in maths as Logical Negation. In other words a NOT gate takes whatever results that are passed through it, usually True or False(0 or 1) and negates them. A NOT gate only requires one value.

AND Gate: An AND gate is a logic gate which implements a methodolgy best known as logical conjunction. The logical conjunction linked with an AND gate appears when both values are true, thus returning the value of true. All other values return false. An AND gate requires 2 values to produce an output.

NAND Gate: A NAND gate follows the same principles as the afforementioned AND gate. However its results are effect by a NOT gate. According to the material above, a NOT gate negates values and an AND gate only returns true if both values are true. Using this we can deduce that the output of a NAND gate will be the exact opposite to those of an AND.

3. The attempt at a solution

Default NAND Gate:
INPUT
A B OUTPUT
0 0 1
0 1 1
1 0 1
1 1 0

Now a NOT gate placed infront of a NAND gate would invert the values being passed through it, but not the output. (This is where i start to get a little confused)

NOT NAND Gate:
INPUT
A B OUTPUT
1 1 1
1 0 1
0 1 1
0 0 0

Which is equal to an OR gate. (But im not sure why?)

NAND NOT Gate:
INPUT
A B OUTPUT
0 0 0
0 1 0
1 0 0
1 1 1

Which is equal to an AND gate. Which kind of makes sense to me because if you put a negative and a negative together you get positive but once again im not exactly sure.

Thanks in advance for any help, i appreciate it.

2. Jul 12, 2010

Dickfore

Hint: The Law of double negation.

3. Jul 12, 2010

(logic) The statement that the negation of the negation of A implies A, for any proposition A.

Ok so NOT is a negation. And NAND is the negation of AND.

So NOT NAND(negation of the negation of A) = AND

NAND NOT (Negation of A Negated) = NAND?

Sorry im still not getting this completely.

Last edited: Jul 12, 2010
4. Jul 12, 2010

Staff: Mentor

http://en.wikipedia.org/wiki/Demorgan's_law

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5. Jul 12, 2010

No it doesnt but thanks anyway.

(It might but i dont understand how i can use it)

EDIT:
A & B = Inputs
O = Output
- = NOT
-(A^B) = NAND

NOT NAND = --(A^B) = (A^B) = AND (Is this correct?)

NAND NOT = -(A^B)-O = ? (I have absolutely no idea with this one, i dont even know how to set this one out.)

Last edited: Jul 12, 2010
6. Jul 12, 2010

Dickfore

Also, NOT is a unitary operation and NAND is a binary operations. Where before do you place your NOT gate?

7. Jul 12, 2010

Where before do you place your NOT gate?

Sorry can you rephrase that?

8. Jul 12, 2010

Dickfore

Part of your problem statement says:

A NAND gate has 2 input and 1 ports. A NOT gate has 1 input and 1 output port. Draw the circuit diagram corresponding to your exact connection.

9. Jul 12, 2010

Im not sure i can.

Because like you said, NOT gate has 1 input and 1 output. You cant connect 1 output to 2 inputs, it wouldnt work.

So a NOT NAND gate is impossible?

I could see how that works. It takes the output value of the NAND, than negates it.

So a NAND NOT gate is equal to an AND gate.

Is this correct?

10. Jul 12, 2010

Dickfore

yes.

11. Jul 12, 2010

Haha damn my physics teacher. He told me this would be a good thing to right my report about, guess he included a trick question in there for me.

Thanks :) Now maybe i can get some sleep

12. Jul 12, 2010

Phrak

It might help further if you expand your truth table to 6 columns.

Code (Text):

A' B' A  B  O  O'
0  0  1
0  1  1
1  0  1
1  1  0

O = not(A&B). Fill in A', B' and O' with the inverted values of A, B and O, respectively.

You should see that O' = not(A'orB'). This graphical method may be better for you to get used to than a tangle of words and symbols.