What happens when you place a NOT gate before and after a NAND gate

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Discussion Overview

The discussion revolves around the behavior of NOT and NAND gates in digital logic, specifically what occurs when a NOT gate is placed before and after a NAND gate. Participants explore the implications of these configurations through truth tables and logical reasoning, with a focus on understanding the relationships between the gates.

Discussion Character

  • Homework-related
  • Exploratory
  • Technical explanation
  • Debate/contested

Main Points Raised

  • One participant describes the function of NOT, AND, and NAND gates, providing truth tables for each configuration.
  • Another participant suggests the Law of double negation as relevant to the discussion.
  • There is confusion about the output of the NOT NAND configuration and its equivalence to an OR gate.
  • Participants question the feasibility of connecting a NOT gate to a NAND gate due to their differing input/output requirements.
  • One participant concludes that a NAND NOT configuration results in an AND gate, while another expresses uncertainty about this claim.
  • A suggestion is made to expand the truth table to better visualize the relationships between the inputs and outputs.

Areas of Agreement / Disagreement

Participants express varying levels of understanding regarding the configurations of the gates. Some agree on the output of the NAND NOT configuration being equivalent to an AND gate, while others remain uncertain about the implications of the NOT NAND configuration. The discussion does not reach a consensus on all points raised.

Contextual Notes

Participants mention the need for clarity in circuit diagrams and the limitations of their current understanding of the gate configurations. There is an acknowledgment of the complexity involved in connecting gates with differing input/output characteristics.

Who May Find This Useful

This discussion may be useful for students studying digital logic design, particularly those grappling with the relationships between basic logic gates and their configurations.

dreadfear
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Homework Statement


What happens when you place a NOT gate before and after a NAND gate


Homework Equations


Current Research(My own work):
NOT Gate: A NOT gate is also known as an inverter. It is a logic gate which implements a methodology best known in maths as Logical Negation. In other words a NOT gate takes whatever results that are passed through it, usually True or False(0 or 1) and negates them. A NOT gate only requires one value.

AND Gate: An AND gate is a logic gate which implements a methodolgy best known as logical conjunction. The logical conjunction linked with an AND gate appears when both values are true, thus returning the value of true. All other values return false. An AND gate requires 2 values to produce an output.

NAND Gate: A NAND gate follows the same principles as the afforementioned AND gate. However its results are effect by a NOT gate. According to the material above, a NOT gate negates values and an AND gate only returns true if both values are true. Using this we can deduce that the output of a NAND gate will be the exact opposite to those of an AND.

The Attempt at a Solution



Default NAND Gate:
INPUT
A B OUTPUT
0 0 1
0 1 1
1 0 1
1 1 0

Now a NOT gate placed infront of a NAND gate would invert the values being passed through it, but not the output. (This is where i start to get a little confused)

NOT NAND Gate:
INPUT
A B OUTPUT
1 1 1
1 0 1
0 1 1
0 0 0

Which is equal to an OR gate. (But I am not sure why?)

NAND NOT Gate:
INPUT
A B OUTPUT
0 0 0
0 1 0
1 0 0
1 1 1

Which is equal to an AND gate. Which kind of makes sense to me because if you put a negative and a negative together you get positive but once again I am not exactly sure.

Thanks in advance for any help, i appreciate it.
 
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Hint: The Law of double negation.
 
(logic) The statement that the negation of the negation of A implies A, for any proposition A.

Ok so NOT is a negation. And NAND is the negation of AND.

So NOT NAND(negation of the negation of A) = AND

NAND NOT (Negation of A Negated) = NAND?

Sorry I am still not getting this completely.
 
Last edited:
dreadfear said:

Homework Statement


What happens when you place a NOT gate before and after a NAND gate


Homework Equations


Current Research(My own work):
NOT Gate: A NOT gate is also known as an inverter. It is a logic gate which implements a methodology best known in maths as Logical Negation. In other words a NOT gate takes whatever results that are passed through it, usually True or False(0 or 1) and negates them. A NOT gate only requires one value.

AND Gate: An AND gate is a logic gate which implements a methodolgy best known as logical conjunction. The logical conjunction linked with an AND gate appears when both values are true, thus returning the value of true. All other values return false. An AND gate requires 2 values to produce an output.

NAND Gate: A NAND gate follows the same principles as the afforementioned AND gate. However its results are effect by a NOT gate. According to the material above, a NOT gate negates values and an AND gate only returns true if both values are true. Using this we can deduce that the output of a NAND gate will be the exact opposite to those of an AND.

The Attempt at a Solution



Default NAND Gate:
INPUT
A B OUTPUT
0 0 1
0 1 1
1 0 1
1 1 0

Now a NOT gate placed infront of a NAND gate would invert the values being passed through it, but not the output. (This is where i start to get a little confused)

NOT NAND Gate:
INPUT
A B OUTPUT
1 1 1
1 0 1
0 1 1
0 0 0

Which is equal to an OR gate. (But I am not sure why?)

NAND NOT Gate:
INPUT
A B OUTPUT
0 0 0
0 1 0
1 0 0
1 1 1

Which is equal to an AND gate. Which kind of makes sense to me because if you put a negative and a negative together you get positive but once again I am not exactly sure.

Thanks in advance for any help, i appreciate it.

Does this link help?

http://en.wikipedia.org/wiki/Demorgan's_law

.
 
No it doesn't but thanks anyway.

(It might but i don't understand how i can use it)

EDIT:
A & B = Inputs
O = Output
- = NOT
-(A^B) = NAND

NOT NAND = --(A^B) = (A^B) = AND (Is this correct?)

NAND NOT = -(A^B)-O = ? (I have absolutely no idea with this one, i don't even know how to set this one out.)
 
Last edited:
Also, NOT is a unitary operation and NAND is a binary operations. Where before do you place your NOT gate?
 
Where before do you place your NOT gate?

Sorry can you rephrase that?
 
dreadfear said:
Where before do you place your NOT gate?

Sorry can you rephrase that?

Part of your problem statement says:

What happens when you place a NOT gate before ... a NAND gate

A NAND gate has 2 input and 1 ports. A NOT gate has 1 input and 1 output port. Draw the circuit diagram corresponding to your exact connection.
 
Im not sure i can.

Because like you said, NOT gate has 1 input and 1 output. You can't connect 1 output to 2 inputs, it wouldn't work.

So a NOT NAND gate is impossible?

What about a NAND NOT?

I could see how that works. It takes the output value of the NAND, than negates it.

So a NAND NOT gate is equal to an AND gate.

Is this correct?
 
  • #10
yes.
 
  • #11
Haha damn my physics teacher. He told me this would be a good thing to right my report about, guess he included a trick question in there for me.

Thanks :) Now maybe i can get some sleep
 
  • #12
It might help further if you expand your truth table to 6 columns.

Code:
A' B' A  B  O  O'
      0  0  1
      0  1  1
      1  0  1
      1  1  0

O = not(A&B). Fill in A', B' and O' with the inverted values of A, B and O, respectively.

You should see that O' = not(A'orB'). This graphical method may be better for you to get used to than a tangle of words and symbols.
 

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