Ttl Definition and 30 Threads

Homework Statement: There are the propagation delays from High to Low and from Low to High, and I wonder if they are equal? Homework Equations: That is $$ t_{PLH}=t_{PHL}$$ I suppose they should be equal.

Is ohmic resistance a "necessary evil" in order for transistors to be able to function as logic gates? I mean, I have seen some circuits for the NAND gate in RTL and TTL and they both seem to involve ohmic resistances. Can we make a super conducting NAND gate that will have total ohmic...

[SIZE=16px][FONT=Helvetica Neue]Spec [SIZE=16px][FONT=Helvetica Neue]My job, as an undergraduate EE student, is to create a test rig for offsite electronics (environmental sensors hooked up to a data logger, 12V batteries and solar panels). The test rig should be able to evaluate output from...

Homework Statement Calculate the output function and draw a graph of output voltage in the function of the input voltage of the following digital circuit: Homework Equations 3. The Attempt at a Solution [/B] By analysis of what happens when inputs A and B are on the logical "1" i have...

Hi fellow forum-ers :), I have a test in about two weeks where i am going to be given a dtl or ttl circuit which i have to analyse and calculate its function. The professor said that the circuit given to us will always be a useful and existing one meaning he's going to give us some NAND, NOR or...

My teacher asked me to explain the reason why we need to tune the offset of the function generator of a ttl circuit to 2.5v(or -2.5v::didn't hear it clearly!) to create a shift from -2.5v to 2.5v instead of having it shift between 0v to 5v. I've done some research regarding the high voltage and...

Hello engineers! :)I have a question bothering me i quite can't figure out. I have a Priority encoder: http://www.digikey.com/product-search/en?vendor=0&keywords=ls148d&stock=1 datasheet: http://www.ti.com/lit/ds/symlink/sn74ls148.pdfAnd this RF-Switch...

So this summer I plan on taking a long break from my arduino and learning some more 'ancient' and fun stuff. I plan on learning to use and make different circuits using TTL's. I have read a bit on it and learned on the basic logic gates like(using '/' as separator for the reverse) n/and,n/or...

Homework Statement Question: Refer to Fig. 6-5. This standard TTL 2-input NAND gate uses ______ (open-collector, totem pole) outputs. Solution: The 2-input TTL NAND gate in Fig. 6-5 (which is attached as "TheFigure.jpg") uses a totem pole output configuration. Homework Equations N/A...

If some one could explain the operation of both the double emitter transistor and the circuit in general I would be very thankful. All the best,

Homework Statement We just did an experiment on the input and output characteristics of TTL and CMOS NAND gates. We recorded the following data for each of the two gates. 1) Input Threshold Voltage 2) Input Current(for input logic 1 and 0) 3) Output Voltage(for output logic 1 and 0) 4)...

Hi I am trying to design a TTL circuit, which is based on a NOT-gate (http://en.wikibooks.org/wiki/File:Electronics_TTLNOT.PNG). It has to do the following: When 5V are applied to it, it should deliver a short pulse such to A. The exact length of the pulse is not important at all, what is...

Why do TTL integrated circuits assume unconnected inputs to be at logic level HIGH? Does the answer lie in the circuitry itself or some other factor?

Greetings to all, I am reading datasheet for a Schmitt trigger 74LS14 and don't understand the exact meaning of "output current". ti.com/lit/ds/symlink/sn74ls14.pdf It says: IOH High-level output current MAX –0.4 mA IOL Low-level output current MAX 8 mA Does not say anything...

Hi, new to these forums and glad I found them! I am working on a project that requires conversion of fairly hi-speed signals (10us pulses) from 5V to 12V. The usual open collector with a pull up is much too slow getting from 0 to 12V. I really need the ramp to happen between .05us to 1us...

Hello! I am wondering if anyone knows what R_L and C_L on a TTL circuit means? I think it is load resistance and load capacitance, but how are they connected to the TTL? I am specifically thinking about a 74LS74 Dual Positive-Edge-Triggered D Flip-Flop.

Why does TTL consume more power than CMOS? I googled but did not find any useful information. I can think of the Base emitter diode drop as one cause. But are there other reasons why TTL consumes more power. Can I compare the ON resistance of MOSFETs Vs BJTs?

Hola. I am trying to convert a 5V TTL down to a 3.3V LVTTL. This is an ex-Physics ex-student asking. Any clue?

Hi .. I have looked every where for the properties of this series (TTL) i can't find it anywhere .. any help is much appreciated Thanks

Can someone explain to me how to create a 0-3V TTL waveform at 20 Hz in Capture (Pspice)? - edit: Figured out how to adjust the pot, but still can't figure out the TTL waveform.

A 20Hz TTL waveform is applied to the circuit... The Attempt at a Solution - I'm working an activity for my lab tomorrow (not actually due for any points, just to help us get an understanding of the lab), but I'm not really sure what it means when it says a "20 Hz TTL waveform"...

Why floating input is considered as HIGH in TTL based logic ckts ?

Hi there, I have a simple question. OR gate between 2 output TTL signals can be done with diodes and simply join the signals toguether... ? Output TTL signals have a pull up resistor included: For one output: --------------- Output level 1) 5 V / -4 ma Output level 0) 0.7 V / -16ma...

i am working with an encoder that says its output is impulse(ttl). I'm not quite sure what this means. is it just a digital signal? how does it work? any help you can give me would be great.

Say I needed 6 D Flip-Flops and wanted to calculate the maximum power dissipated by them. I have 2 Flip-Flops on each IC giving a total of 3 ICs. I'd look in the data books and find Vcc max and Icc max and multiply to find the power... My Question: would I use Vcc * Icc for every FLIP-FLOP...

I built this circuit with a computer program. Basically when the switch S1 is pressed to fast I get a high/low pulse coming through the latch which really messes up the output. ( Output will continually go from high to low rapidly) I was wondering if this will be present also if I was to build...

Is it true that a "high" input of a TTL gate shouldn't be left floating but instead connected to +Vcc through a pullup resistor because this way the propagation delay time is reduced and less noise is captured? If that's true, should a pullup resistor be used when connecting the input of a...

Hi I need you help I must connect this function Z= X3'X2'X1 X0+X3'X2 X1'X0+X3'X2 X1 X0 in a Multiplexer the 74LS151 without using any other TTL device. I was thinking of putting in the 3 bit entry X3 , X2 , X1 so how do i put X0 and where ? How do I connect I's to form that function, I...

I just want to be sure about this: i have a spec sheet for CMOS with CMOS and TTL loads. The question is whether CMOS could drive TTL, so the general formula is fan-out = min(IOHmax/IIH, IOLmax/IIL) where IOHmax is the max output current at high state; IOLmax ... in low state; IIH is...

Can someone tell me what does high or low impedances mean for the inputs and outputs for TTL logic,and how you can see that a port is high(low) impedant. And what if you connect other things to such ports?