Creating an OR Gate with Two TTL Output Signals

[pghislain]

Hi there,

I have a simple question.
OR gate between 2 output TTL signals can be done with diodes and simply join the signals toguether... ?

Output TTL signals have a pull up resistor included:

For one output:
---------------
Output level 1) 5 V / -4 ma
Output level 0) 0.7 V / -16ma


What happens if we join 2 wires:

TTL Output 1 ----|<------|
TTL Output 2 ----|<------|---------- TTL Input


1 + 1 = 5 V / -8 ma - okay
0 + 0 = 0,7 V / -32 ma - ... limit for the input TTL device

0 + 1 = 5 V / -4mA - the level 0, O.7 V can't provide current

I know, I can do that with TTL components.

Best Pierre.

 

[NoTime]

What happens if we join 2 wires:

It's called wired OR.
It works better if you use Open Collector (OC) devices.
The 74XX series had several OC devices.
It's not a recommended practice for non oc devices and tends to cause problems.
Don't try this with CMOS devices.