A question about H parameter model

[null void]

Homework Statement

consider all those capacitor is a short circuit for the ac current.

I am to find
i) Input impedance,
ii) output impedance
iii)voltage gain, A_v = V_out / V_in
iv) current gain, A_i = I_out / I_in

The Attempt at a Solution

So i first draw the H parameter model,

Then for the input impedance,
Z_i =1 / ( 1/690 + 1/270 + 1/2) = 1.9796k Ω

ii) Output impedance, Z_o = R_collector = 27k Ω

iii) I_base = V_in / H_ie = V_in / 2k
V_out = -(H_fe)(I_base)(R_collector)

Voltage gain, A_v = V_out / V_in
= -H_fe x R_collector / H_ie
= -50 x 27 / 2
= -675
this figure make me think my answer is wrong...

iv) I_in = V_in / Z_in
I_out = -H_fe x V_in / H_ie

Current gain, A_i = -49.49


I feel like i did something wrong in iii, and probably also got something wrong in other answer, can someone help me to check?

 

[gneill]

Were you not given values for H_oe and H_re?

 

[null void]

yeah no info about Hoe and Hre, probably we can just ignore them in this question

 

[gneill]

yeah no info about Hoe and Hre, probably we can just ignore them in this question

If that's the case, then I can't spot anything wrong with your answers.

If this circuit were realized with a real transistor I would expect a voltage gain more in the neighborhood of -100.

 

[The Electrician]

If this circuit were realized with a real transistor I would expect a voltage gain more in the neighborhood of -100.

Would you expect this with the OP's circuit, the same hfe and hie, but with non-zero hre and hoe?

 

[gneill]

Would you expect this with the OP's circuit, the same hfe and hie, but with non-zero hre and hoe?

Yes, I believe I would. I think h-parameter modelling for this particular circuit is iffy due to the resistors making up the bias network. The currents are going to be rather small and the operating point may not be in a great location.

Just for fun I set up the circuit in LTSpice to see how it behaves. I used a 2N3904 transistor which has average h-parameters of:

h_ie = 3 kΩ
h_fe = 200
h_oe = 6 μS
h_re = 2 x 10^-4

Yes, the hfe is higher than that specified in the problem, but a higher hfe should only increase the gain (or if the circuit is designed properly, not affect it by much). I used 100 μF capacitors and an input signal at 1000Hz.

The quiescent base current is about 336 nA, the collector current about 102 μA. The base-emitter voltage is 596 mV. Collector-emitter voltage 2.21 V.

Driving the input with 1 mV @ 1000 Hz yielded a Vo of 103 mV. That makes the gain -103 for this setup.

Interestingly, changing the supply voltage from 6 V to 12 V raised the gain to -250. This is evidence that the transistor is operating in a tricky region for simple linear analysis.

Of course, this doesn't change the OP's analysis which required the use of an h-parameter model.

 

[The Electrician]

Yes, I believe I would. I think h-parameter modelling for this particular circuit is iffy due to the resistors making up the bias network. The currents are going to be rather small and the operating point may not be in a great location.

Just for fun I set up the circuit in LTSpice to see how it behaves. I used a 2N3904 transistor which has average h-parameters of:

h_ie = 3 kΩ
h_fe = 200
h_oe = 6 μS
h_re = 2 x 10^-4

Yes, the hfe is higher than that specified in the problem, but a higher hfe should only increase the gain (or if the circuit is designed properly, not affect it by much). I used 100 μF capacitors and an input signal at 1000Hz.

The quiescent base current is about 336 nA, the collector current about 102 μA. The base-emitter voltage is 596 mV. Collector-emitter voltage 2.21 V.

Driving the input with 1 mV @ 1000 Hz yielded a Vo of 103 mV. That makes the gain -103 for this setup.

Interestingly, changing the supply voltage from 6 V to 12 V raised the gain to -250. This is evidence that the transistor is operating in a tricky region for simple linear analysis.

Of course, this doesn't change the OP's analysis which required the use of an h-parameter model.

This problem is a good example of the disconnect between classroom examples and real world circuits.

If by some magical means a BJT could be biased without the use of external resistors, etc., we could take the resultant h-parameters and calculate the Av of the transistor alone. For this situation, the collector load resistance in provided by 1/hoe, typically very large:

Av = hfe/(hfe*hre-hie*hoe)

and, of course, if hre=0 then Av = hfe/(-hie*hoe)

For these parameters:

h_ie = 3 kΩ
h_fe = 200
h_oe = 6 μS
h_re = 2 x 10^-4

the voltage gain is 9090.9

Notice that this gain is positive! This is because the hre parameter provides positive feedback, so much so in this case as to change the sign of the voltage gain (such a circuit gain is not stable, of course; the circuit would latch up).

If we set hre=0, then the voltage gain is -11111.1; the removal of hre's positive feedback has led to a major change in Av.

With hre non-zero, and with a 27000 ohm Rc, Av is -2244.4; if hre is zero and with Rc = 27000 ohms, Av is -1549.05

The positive feedback provided by a non-zero hre causes the gain of a typical common emitter amplifier to increase in magnitude, rather than to decrease.

If we once again take all 4 h-parameters to be non-zero, and add a 27000 ohm collector resistor, Av is calculated as -2244.4 compared to 9090.9 without the 27000 ohm Rc. The addition of Rc has reduced the effect of hre enough to change the sign of Av.

These voltage gains are much greater than the Av of -100 to -200 obtained with simulation. One wonders why. I think the reason is that the h-parameters with a collector current of 102μA are much different than they are at a collector current of milliamperes.

The OP's circuit has an Rc of 27000 ohms which is much too high for a practical amplifier.

 

[null void]

Thanks guys, learned something new