ALU status register carry equation

[garr6120]

I was wondering what the carry (C) equation for the logic gates would be in an ALU status register?

I originally thought that it was C equals the last carry output. However, my colleagues tell me its C equals to the sum of the last bit primed AND the last carry output.

Can someone clarify my misconception if I am wrong?

 

[mfb]

You mean how carry is set if the ALU performs OR, AND or similar operations? It will depend on the ALU, I don't think it makes sense to use the carry bit from these operations.

 

[garr6120]

You mean how carry is set if the ALU performs OR, AND or similar operations? It will depend on the ALU, I don't think it makes sense to use the carry bit from these operations.

I mean when the ALU uses arithmetic sorry.

 

[berkeman]

I originally thought that it was C equals the last carry output. However, my colleagues tell me its C equals to the sum of the last bit primed AND the last carry output.

What does this mean? You get a potential carry output bit set if the result of the add generates an overflow/carry in the target register. How can it be dependent on a previous operation?

Can you give an example of the Assembly code you have in mind, and mention a potential ALU that we can use to answer the question?

 

[berkeman]

For example...

http://www.learnabout-electronics.org/Digital/images/ALU-logisim.gif

 

[mfb]

I mean when the ALU uses arithmetic sorry.

There, carry is simply the next bit after the largest bit the ALU regularly has. If you want to add 1100 0000 + 0110 0000 the result is 1 0010 0000, but an 8-bit ALU can only show 0010 0000, the remaining bit is treated as carry.