Any suggestions on deep SiO2 etches (400um)?

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Discussion Overview

The discussion revolves around the challenges of etching deep SiO2 (fused quartz/silica) wafers, specifically targeting a bulk etch depth of 300-400μm. Participants share their experiences, techniques, and materials used in the etching process, exploring both mechanical and chemical methods.

Discussion Character

  • Exploratory
  • Technical explanation
  • Debate/contested
  • Experimental/applied

Main Points Raised

  • One participant reports difficulties in achieving a detailed anisotropic etch on SiO2 wafers, having tried various masks with limited success.
  • Another participant recalls using mechanical powder blasting for etching glass wafers, noting that it allows for ~300μm diameter through-holes but may not be available to the current poster.
  • Discussion includes the use of 49% HF for wet etching, with a noted etch rate of about 1μm/min, though concerns about mask durability are raised.
  • A participant suggests using a thin Cr or Ti layer under Au to mitigate undercutting during etching, despite potential delamination issues.
  • There is mention of the possibility of using a Focused Ion Beam (FIB) as a more expensive alternative for etching, but it is characterized as a serial process suitable for fewer holes.
  • One participant expresses uncertainty about the dielectric strength of Pyrex compared to fused silica, referencing conflicting information from different sources.
  • Another participant indicates that they found valuable insights in the work of F.E.H. Tay, which may lead to cost savings by switching to a different substrate and mask material.
  • There is a suggestion to explore laser drilling as another potential method, although one participant admits to being unfamiliar with its challenges and costs.

Areas of Agreement / Disagreement

Participants express a range of techniques and materials for etching SiO2, with no consensus on the best approach. Some participants share successful methods while others highlight ongoing challenges and uncertainties in achieving the desired etch depth.

Contextual Notes

Participants note limitations in their current methods, including the availability of certain etching techniques and the need for further research into dielectric properties of materials used.

Who May Find This Useful

This discussion may be useful for researchers and practitioners in microfabrication, particularly those working with SiO2 etching techniques and materials.

OhulahanBass
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I've been struggling and wasting mask materials trying to etch SiO2 wafers. The orientation of the etch is not a huge issue. I need to perform a detailed anisotropic etch on my feature side and etch the bulk depth from the other side.

For my bulk etch I have tried multiple masks in BOE with little success. My wafer is 500um thick and I want a bulk etch of 300-400um (future wafers may be thinner).

The wafer material is Fused Quartz/Silica (SiO2).

Masks attempted were Cr-Au-Cr-Au, NR9 & SU8.

Any suggestions or shared experience would be helpful. I don't think many have tried such etches and for good reason. I may be trying the impossible.
 
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When I last worked in microfabrication (2005), essentially the only approach was to mechanically powder blast the glass wafer. You can get ~300μm diameter through-holes in a 500μm wafer this way, etching halfway through each side with an elastomer mask. At the time, researchers were trying to develop a DRIE process for SiO2, but the molecule's so stable that there's really no analogue to the use of SF6 to etch Si.

On the wet side, 49% HF will etch oxide at about 1μm/min, but as you know, it's hard on masks. You might try <4nm Cr or Ti under Au; the adhesion layer here is so thin that kinetic limitations prevent fast undercutting. You'll get some delamination around the opening, but it may be acceptable.
 
Mapes said:
When I last worked in microfabrication (2005), essentially the only approach was to mechanically powder blast the glass wafer. You can get ~300μm diameter through-holes in a 500μm wafer this way, etching halfway through each side with an elastomer mask. At the time, researchers were trying to develop a DRIE process for SiO2, but the molecule's so stable that there's really no analogue to the use of SF6 to etch Si.

On the wet side, 49% HF will etch oxide at about 1μm/min, but as you know, it's hard on masks. You might try <4nm Cr or Ti under Au; the adhesion layer here is so thin that kinetic limitations prevent fast undercutting. You'll get some delamination around the opening, but it may be acceptable.

The mask I am trying to perfect is Cr-Au-Cr-Au with Au covering Cr sidewalls for delamination prevention then SU8 on top to prevent pin holes. The cleaner I make the process the better the adhesion so far. I don't think I have powder blast available to me at CU but with some expensive training I could get my hands on a Focused Ion Beam which may be the only, much more expensive, option.

Thanks for insight. After much journal research the deepest published etch I've found in silica is 100um. Perhaps I was dreaming to attempt 300-400um.
 
OhulahanBass said:
I don't think I have powder blast available to me at CU but with some expensive training I could get my hands on a Focused Ion Beam which may be the only, much more expensive, option.

You'd outsource the powder blasting. (I had the vendor Sensor Prep make arrays of through-holes in a standard 4" Pyrex wafer.) FIB is a serial process and would only be viable if you want just a few holes.

Have you read all of F.E.H. Tay's work on wet etching of glass wafers? Lot of good information on Au and a-Si masks there, if you can live with the undercut from 49% HF etching. (And it looks like I was low on the etch rate; it's reported to be >10μm/min for Pyrex.)

Finally: another option is laser drilling, but I'm not familiar with the difficulties/cost.
 
I have looked at many papers on Au and Si masks for SiO2 and Pyrex. Unfortunately Pyrex has a much weaker dielectric strength than pure silica, I need the dielectric properties similar to pure silica.

Thank you for the lead on F.E.H. Tay, I've found a few papers of his to review this weekend.

Perhaps this is a topic for a different thread, but I have found manufacture websites claim Pyrex has a much smaller dielectric strength than Fused Silica but the wiki sites say the opposite...?
 
Wow, read some Tay papers this weekend and I think your referral may be saving me hundreds of dollars by switching to a cheaper substrate and eliminating Au entirely. With a D263 substrate and Mo mask I should be able to reproduce similar success to Tay's. I'll try a similar method with the silica substrates this week and order D263 subs if that doesn't work.

Funny thing is he referenced many of the papers I had already read how ever I never came upon any of his work...I need to revise my journal searching methods.

Thanks again.
 
Good luck!
 

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