Calculating the size of a capacitor in a sample and hold circuit

In summary, the conversation discusses calculating jitter power and signal power, as well as using the SNR equation to determine thermal noise power. However, there is confusion about why the thermal power is negative and what was calculated for the SNR. It is later discovered that there was a simple math mistake in calculating the scaled Pjitter.
  • #1
CoolDude420
198
8
Homework Statement
In sampling system the sample rate is 500 Ms/s with an input signal of range of 1 V
peak−peak and a clock jitter of 1 ps rms . A performance of 60 dB is required for all
signals the Nyquist baseband. Calculate its size of the capacitor.
Relevant Equations
Analog-to-Digital Conversion by Marcel Pelgrom Book
First, I calculate the jitter power with an equation given in the book
1582481543814.png


Next, I calculate the signal power
1582481656848.png


Now, I know that SNR = Psignal/(Pjitter + PthermalNoise),
1582481688065.png


However, I seem to be getting a negative value for the thermal noise power?? My plan was to use this thermal noise power and equate it to kT/C to get my capacitor size. But the thermal power is negative??
What am I doing wrong?
 

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  • #2
the thermal power is negative?? What do you calculate for the SNR?
 
  • #3
sprog said:
the thermal power is negative?? What do you calculate for the SNR?

your SNR is stated as 60dB, so the factor 10^(60/20) yields 1000 fold power ratio, so your scaled Pjitter is around 0.0003

0.125 - 0.0003 is positive not negative simple math mistake?
 

1. How do you calculate the size of a capacitor in a sample and hold circuit?

To calculate the size of a capacitor in a sample and hold circuit, you will need to know the desired hold time, the input signal frequency, and the input signal amplitude. Then, you can use the formula C = (I*T)/(V*ΔV), where C is the capacitance, I is the input signal frequency, T is the desired hold time, V is the input signal amplitude, and ΔV is the desired change in voltage.

2. Why is it important to calculate the size of a capacitor in a sample and hold circuit?

Calculating the size of a capacitor in a sample and hold circuit is important because it determines the hold time and accuracy of the circuit. If the capacitor is too small, the hold time will be short and the accuracy may be compromised. If the capacitor is too large, the hold time will be long and the circuit may be slow to respond to changes in the input signal.

3. How does the input signal frequency affect the size of the capacitor in a sample and hold circuit?

The input signal frequency directly affects the size of the capacitor in a sample and hold circuit. A higher frequency input signal requires a smaller capacitor to achieve the same hold time, while a lower frequency input signal requires a larger capacitor. This is because a higher frequency input signal will have more cycles within the desired hold time, so the capacitor does not need to store as much charge.

4. Can the size of the capacitor be adjusted after it has been selected for a sample and hold circuit?

Yes, the size of the capacitor can be adjusted after it has been selected for a sample and hold circuit. However, this may require recalculating the hold time and accuracy of the circuit. It is important to carefully select the capacitor size during the design stage to avoid any potential issues.

5. Are there any other factors to consider when calculating the size of a capacitor in a sample and hold circuit?

Yes, there are other factors to consider when calculating the size of a capacitor in a sample and hold circuit. These include the leakage current of the capacitor, the temperature and humidity of the environment, and the stability of the power supply. These factors can affect the accuracy and performance of the circuit, so they should be taken into account during the design process.

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