Cat 5 Digital Audio: Transmit/Receive 12 Channels @ 48KHz

[jordanstreet]

Hey guys I'm hoping someone can point me in the right direction here. My goal is to receive 12 and transmit 4 channels of 24 bit audio @ 48KHz over 100ft to 300ft. I would guess that at this distance I need differential signals. The Cat 5 cable would then have the following twisted pairs

1) Vcc and Gnd
2) Clk + and -
3) Transmit + and -
4) Receive + and -

Given the receive of 12 channels being the limiting case: 12 * 24 * 48000 = 13.824 MHz would appear to be the bandwidth requirement of this situation. The RS-485 spec states that the max bandwidth @ 40ft is only 10 MHz.

I know this sort of thing is possible as I've seen it all the time in digital snakes, etc. Any help would be greatly appreciated!

Thanks!
Jordan

 

[berkeman]

Hey guys I'm hoping someone can point me in the right direction here. My goal is to receive 12 and transmit 4 channels of 24 bit audio @ 48KHz over 100ft to 300ft. I would guess that at this distance I need differential signals. The Cat 5 cable would then have the following twisted pairs

1) Vcc and Gnd
2) Clk + and -
3) Transmit + and -
4) Receive + and -

Given the receive of 12 channels being the limiting case: 12 * 24 * 48000 = 13.824 MHz would appear to be the bandwidth requirement of this situation. The RS-485 spec states that the max bandwidth @ 40ft is only 10 MHz.

I know this sort of thing is possible as I've seen it all the time in digital snakes, etc. Any help would be greatly appreciated!

Thanks!
Jordan

RS-485 is a multi-drop network spec. Use 100Base-T transceivers on a point-to-point doubly terminated bus. That will give you plenty of bandwidth.

http://en.wikipedia.org/wiki/100BASE-T#Copper

 

[jordanstreet]

Hey berkeman, thank you for the speedy reply!

I took a look at that and it looks very promising. By doubly terminated, do you mean a resistor equal to the characteristic impedance at both the send and receive on each line to eliminate reflection?

It looks as though one option would be to implement the physical layer using an existing PHY IC, and then communicate from my microprocessor or fpga to the PHY through MII. Since there is no synchronous clock between devices on the 100mbit network it appears as though I would need to use some sort of asynchronous protocol between devices. Any thoughts how that might be accomplished?

Thank you again for the assistance!