CMOS Resistance: Drawing NAND & Solutions

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    Cmos Resistance
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Discussion Overview

The discussion revolves around the resistance calculations in a NAND gate configuration using CMOS technology. Participants explore the resistance values under different input conditions (A and B being high or low) and seek clarification on the assumptions made regarding series and parallel resistances.

Discussion Character

  • Homework-related
  • Mathematical reasoning
  • Technical explanation

Main Points Raised

  • One participant asserts that when both A and B are high, the resistance is Rn + Rn, as the NMOS transistors are in series.
  • Another participant questions whether the resistance when both A and B are low is Rp*Rp/(Rp + Rp), suggesting that the PMOS transistors are in parallel.
  • A participant speculates that if A is high and B is low, the resistance is simply Rp, as they believe the configuration does not fit into series or parallel categories.
  • There is a simplification attempt of the expression Rp*Rp/(Rp + Rp) to Rp/2, which is discussed among participants.

Areas of Agreement / Disagreement

Participants generally agree on the resistance values for certain conditions, but there is uncertainty regarding the configuration when A is high and B is low, as well as the simplification of the resistance expression. The discussion remains unresolved on these points.

Contextual Notes

Participants express uncertainty about the assumptions made regarding the series and parallel configurations of the resistances, and the simplification of the resistance expression is not universally accepted.

nobrainer612
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Homework Statement



I drew a NAND in the picture.

302tlld.jpg




The Attempt at a Solution



I know when A and B are both high ( value 1), resistance will be Rn + Rn because those 2 NMOS will be turned on and resistance will added up since they are in series.

Also when A and B are both low ( value 0), both PMOS will be turned on. My first question is, 1.) is the resistance become Rp*Rp/(Rp + Rp) because they are in parallel?

My second question is, if A is high (value 1) and B is low ( value 0) , output should be VDD ( value 1). But what will be resistance be? I think they are neither in series nor parallel. So will the resistance only become Rp ?

Hope somebody can share their ideas. Thank you
 
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nobrainer612 said:
I know when A and B are both high ( value 1), resistance will be Rn + Rn because those 2 NMOS will be turned on and resistance will added up since they are in series.

Also when A and B are both low ( value 0), both PMOS will be turned on. My first question is, 1.) is the resistance become Rp*Rp/(Rp + Rp) because they are in parallel?

My second question is, if A is high (value 1) and B is low ( value 0) , output should be VDD ( value 1). But what will be resistance be? I think they are neither in series nor parallel. So will the resistance only become Rp ?

Hope somebody can share their ideas. Thank you
Hi nobrainer612! Those would be my answers, too.

Can you simplify this expression: Rp*Rp/(Rp + Rp) :wink:
 
sorry but I don't get what you mean.

Can you tell me if those I assumed are correct? because I am interested what the resistance is .

simplify this expression: Rp*Rp/(Rp + Rp) : isn't that equal (Rp^2) / 2*Rp = Rp/2?


So what I assumed:

if A is high (value 1) and B is low ( value 0) -----> resistance = Rp only? :bugeye:
Also when A and B are both low ( value 0) -----> resistance = Rp/2 ? :shy:
 
Last edited:
nobrainer612 said:
if A is high (value 1) and B is low ( value 0) -----> resistance = Rp only? ✔[/size][/color]
Also when A and B are both low ( value 0) -----> resistance = Rp/2? ✔[/size][/color]
:smile:
 

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