Configuring band-pass on National MF10 SCF chip

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SUMMARY

The discussion focuses on configuring the National MF10 Switched Capacitor Filter (SCF) chip as a 4th Order band-pass filter. The user seeks guidance on pin connections, as the datasheet provides limited examples, primarily for low-pass configurations. Key insights include the importance of cascading two stages and referencing Figures 9, 16, and 17 from the datasheet for wiring diagrams. The conversation emphasizes the need for specific resistor values and desired frequency specifications to successfully implement the band-pass filter.

PREREQUISITES
  • Understanding of National MF10 SCF chip functionality
  • Knowledge of band-pass filter design principles
  • Familiarity with datasheet interpretation for electronic components
  • Experience with cascading filter stages in circuit design
NEXT STEPS
  • Review the National MF10 datasheet, focusing on Figures 9, 16, and 17 for wiring guidance
  • Research band-pass filter design techniques and calculations
  • Explore practical applications of switched capacitor filters in circuit design
  • Learn about TTL and CMOS logic levels and their impact on filter configurations
USEFUL FOR

Electronics engineers, circuit designers, and hobbyists interested in implementing band-pass filters using the National MF10 SCF chip.

RG
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Hi,
I'm trying to configure the National MF10 Switched Capacitor Filter(SCF) chip to be a bandpass filter.
The problem is that the datasheet has formulas on how to calculate the resistor values for setting up as a band-pass, but there is no example or diagrams to hook up the pins as a band-pass.

The datasheet only shows how to hook up the pins as a low-pass(on page 15).
I have done my calculations , I know what resistors values to use etc..
I only need a diagram to show me how to hook up the pins as a Mode 2, 4th Order band-pass.

the datasheet can be found here --> http://www.national.com/pf/MF/MF10.html

Can anyone familiar with the MF10 please help? :confused:

Drop me a pm if u do not wish to post your reply here, or u know something but not sure if it will work. I'm willing to try it out.

Thanks in advance.
 
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I haven't used this IC but am willing to brain storm with you.
To make this more fun, can you tell me your desired specs?
I'd like to design along with you.

What is your desired center frequency - fo? what upper fH and
lower fL cutoff frequencies have you chosen (-3dB points)?
What clock frequency & resistor values have you chosen?

From the datasheet, it appears you will be cascading two
stages that are both on chip. Fig 9 (of spec sheet) shows the first stage.
We can deduce a lot of information from that diagram. To make a 4th order,
mode 2 BPF, we can use analogous reasoning as the wiring in diagrams Fig 16 and 17 (page 21) indicate. The difference between those two has to diagrams has to do with supply voltages, which may be applicable if your circuit is limited to TTL or CMOS logic levels.

I have already analyzed Fig 16 and 17 and can offer my thoughts.
Page 8 (pin descriptions) has a lot of useful information. I referred back to
it several times thinking about your filter.
 

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