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Designing a Lock-in amplifier from zero

  1. Aug 8, 2012 #1
    Hello everyone
    I have completed my freshman year in EE. For the summer, my professor has asked me to design a lock-in amplifier. First he has asked me to read about AD630. Now after reading the datasheet at (http://www.analog.com/static/imported-files/data_sheets/AD630.pdf), I was a bit confused. I have taken an intro course in circuits and networks(not electronics). The block diagram only used op-amps, resistors and capacitors. Can anyone just explain to me how the thing functions, like how an input signal traverses through the whole structure, undergoing what freq/amplitude/phase changes? Please explain figure 1 on first page and figure 1 on 6th page.
    Really appreciate your help.
     
  2. jcsd
  3. Aug 8, 2012 #2
  4. Aug 8, 2012 #3
    abdul,
    Let me start by mentioning that understanding figure 10 (page 8) will be key for you.
    On that figure there is a modulation input (sine wave) and a carrier input (higher frequency clock). Look at the output. When the carrier input is high, the modulation input goes directly to the output. When the carrier input is low, the modulation input is inverted (negated) then sent to the output.

    It's really important to understand this overall behavior of the chip.

    Next you can go back to the op amp diagrams and study how this is accomplished. This may be a challange if you have not yet studied inverting and non-inverting op amps.

    Now, when looking at the lock-in amplifier in figure 14 (page 10), don't think about the behavior of the op amps within the AD630. Instead, think about figure 10.

    The carrier input is a 400Hz clock so the modulation input will get inverted at 400Hz. Consider a modulation input containing a very weak 400Hz signal plus lots of noise. This (weak 400Hz + strong noise) will get inverted at 400Hz. The inversion does not effect the noise, upside-down noise is still just noise. However the weak 400Hz component will be "detected", or turned into DC, by the inversions. This detection occurs as follows:

    When the weak 400Hz component of the modulation input is high and there is no inversion because carrier input is high, the output will have weak high bias. When the weak 400Hz component of the modulation input switches low, the carrier will also switch and there will now be an inversion. This combination also creates a weak high bias at the output.

    So, a weak 400Hz component on the modulation input causes a weak DC component at the output (we call this detection).

    Next, the AD542 that follows the AD630 is arranged as an integrator. This amplifies the weak DC so that we can get a substantial signal created by presence of 400Hz input.

    I'll be gone for a while, hopefully someone else can pick up if you need more help.

    Sounds like a neat project, hope it goes well.
     
    Last edited: Aug 9, 2012
  5. Aug 9, 2012 #4
    @the emi guy
    That was an awesome explanation. Really cleared the picture as to what does the DC signal signify.
    Now 2 more questions:
    1)How do I interpret this DC signal that the lock-in amplifier generates? How is it(mathematically) related to the modulating signal or our signal of interest that is to be extracted?
    2)Now my professor has asked me to verify and understand the fourier series on the lock-in; I just read the fourier series and the transform today, haven't completely digested it though. Any suggestions like simple experiments etc?
     
  6. Aug 9, 2012 #5
    Clear as mud apparently. You're basically throwing emi_guy's excellent post back in his face. Have you tried sitting down with a pencil and some paper? Maybe a good start would be to multiply two signals and see what the product looks like?
     
  7. Aug 9, 2012 #6
    Abdul, I might have been a bit harsh in my previous post. It just looked to me like you hadn't put in the required effort and that you were simple copy-pasting your profs questions here, hoping for an easy ride. But I realize now that I can't know that, so I should probably have stayed out of it. Cheers.
     
  8. Aug 11, 2012 #7
    @gnurf
    No worries. I might have been posting the questions without self-effort. After some pen and paper and reading, i did get the hang of the thing. Thanks for your ediction.
    Now I am driving the AD630. And I've tried to multiply the sine and the square. Problem is that i'm not getting the modulated signal as shown in the data sheet(fig 10). I'm getting half of it i.e. I'm getting the lower half of the signal correct with the sinusoidal envelope. The upper half is still the straight sqaure waves.
    Is there a problem with the phase difference? Are they 180degrees apart? How do I make the phase difference of two signals(generated from different function generators) zero?
    Or is there some other problem?
     
  9. Nov 21, 2012 #8
    I have used these techniques many times and one time I did not trust the DC amplifier that followed the phase sensitive detector. I didn't even trust the detector. Fortunately I could turn off the signal and that way find the residual DC. Also if you can set the frequency of the signal to be slightly different from the reference than the output will show a slow sine wave. Such a wave will strongly convince you that the signal was there. I saw it. Something was there.
     
  10. Nov 23, 2012 #9

    jim hardy

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    yuo might look into Signetics NE565 for an intro to lock in amplifiers (PLL ? )...
     
  11. Nov 24, 2012 #10
    I have experience with the NE565 and the CD4046 my favorite PLLs. I am looking for a higher frequency device for the Amateur 2 meter band = 150 MHz.

    I build boards and I am a strictly a through hole man. Small surface mount is too hard and the footprints are always different. Besides I use sockets in case the part gets fried.

    I wonder about why there are massive Lock In Amplifiers with massive prices when these little PLLs are so cheap. What is so important in the big machines?

    Also I looked on the dial of a commercial Lock-In and the input voltage range was enormous. Too big to make sense. As I see it the lowest voltage one can deal with is at the thermal noise level. The highest is near lightening. That is a finite range. Even knowing the narrow bandwidth advantage, the low end of the input dial seemed like wishful thinking.

    Any ideas?
     
  12. Nov 27, 2012 #11
    As you push closer to the UHF band you may need to go surface mount. Have Santa bring you a nice binocular microscope and two good soldering irons with fine tips, one for each hand. You will be amazed what your hands can do when your eyes can see the work.

    I don't think there is anything in them that is particularly expensive, unless you get the high stability ovenized oscillator options. Guess it adds up: DSP, memory, embedded processor, LCD display, linear regulators on all the power rails, GPIB interface, knobs/buttons, production test ... It is a low volume market and they probably get north of 75% gross margin.
     
    Last edited: Nov 27, 2012
  13. Apr 6, 2013 #12
    Thanks a lot every body for sharing your ideas. I'm sorry for such a late reply. I did manage to understand the Lock-in amplifier and make one in September 2012. here's the linkhttp://physlab.lums.edu.pk/images/3/3c/Lockin_Sultan.pdf. [Broken] I'll be pleased to hear your feedback on it.
     
    Last edited by a moderator: May 6, 2017
  14. Apr 7, 2013 #13
    Congratulations Abdul,

    Thanks for sharing your results. Looked like it was an interesting project.
     
  15. Dec 2, 2013 #14
    This summer I was again tasked with the Lock-in Amplifier project. This time I gained a much better understanding of the electronics. And now in my 5th semester, I'm taking Electronic circuits and devices and Communication Systems, I keep having flashbacks of my summer work. Here's the link.
    http://physlab.lums.edu.pk/images/0/07/Sultan_presentaion.pdf
    The main problems faced were that of line hum removal and optical sensor noise, more specifically the frequency compensation of the trans-impedance amplifier. This time better results were obtained.
    The joy in the project came from the fact that I arrived at the solution through as zig-zag a path as possible. Whenever I got stuck, I thought of reasons of why the circuit did not function, and what possible sources of noise could there be. I explored many unfamiliar terrains, specially the ones concerning noise. Noise analysis and control is more of an art than science. There're only certain rules of thumb one should remember, namely KVL, KCL and Murphy's Law. A link by Analog Devices proved extremely helpful.
    http://www.analog.com/static/imported-files/rarely_asked_questions/moreInfo_raq_analogBreadboarding.html [Broken]
    Thank you everyone for the help you people provided. I'd love to hear your feedback.
     
    Last edited by a moderator: May 6, 2017
  16. Dec 3, 2013 #15
    Abdul,

    Great to hear from you.

    I would love to see your work but I am having trouble accessing your .pdf
    Can you attach it into physicsforums (paperclip icon)?
     
  17. Dec 3, 2013 #16
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