I'm looking for a complete definition of the switching window in the context of comparators. In particular, I want to make sure I'm not misunderstanding how hysteresis is implemented in the AD630 (Analog Devices) chip. http://www.analog.com/UploadedFiles/Data_Sheets/AD630.pdf [Broken] See page 2, in the spec table for the comparator, where the switching window is specced. Also see page 6, under 'Circuit Description', where it says: Does this mean that no switching will occur until the 1.5 mV differential signal is exceeded? In other words, if one input is grounded, and the other input has a stable sine wave, then switching will occur exactly at 1.5 mV above (below) the zero crossing during the increasing (decreasing) half-cycle? Also, this should introduce a phase shift of roughly 10-3 in the output for say, a 1V input signal. Is that right? And finally, what is the point of this? The only sense I can make out of it is that it avoids instability around the zero-crossings due to noise in the input signal. But this is already taken care of by the recommended hysteresis circuit in (figure 7) page 8. If I understand that part correctly, it makes the output switch at a differential signal of 0.5 mV (above and below zero). Why would they recommend a 0.5 mV hysteresis circuit, when the chip has a built in 1.5 mV "safety window." I think my understanding of the term 'switching window' is flawed. Does it in fact mean that switching could happen anywhere within the 1.5 mV window beyond zero, with an essentially 100% probability of switching beyond the window, and some non-zero (maybe sigmoidal) probability distribution within it? What other mistakes am I making in my reasoning? Please be gentle with me - I'm not traditionally trained in electronics.