Designing priority encoder with 4-16 decoder and 8-1 MUX

[Kurokari]

Homework Statement

Design a 4 input priority encoder with a 4 to 16 decoder and a 8 to 1 multiplexer.

Homework Equations

Priority encoder is where when the highest priority bit is equal to a logical "1", then the rest of the lower priority input are ignored.

The Attempt at a Solution

For the MUX design, since we can only use a 8 to 1 MUX, means we'll have to use at least 2 of them. But I'm not very sure on how to relate the 2 outputs into one.

For the decoder design, I'm just confused. Shouldn't a priority encoder be a encoder, while a decoder is used to decode input? Is it possible that the question I have meant something else but a decoder?

 

[haruspex]

The end result will be a 2 bit output, yes? That fits with needing two single bit output multiexers.
Each multiplexer would need (in principle) 11 inputs, no?
As for encoder versus decoder, the distinction is a bit artificial. I guess that decoders typically arrange that no two different inputs vectors produce the same output, whereas encoders typically cannot do that.