Design a 2 to 4 Decoder using 4 to 16 Decoder

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Discussion Overview

The discussion revolves around designing a 2 to 4 decoder using a 4 to 16 decoder, focusing on the correct interpretation of inputs and outputs, as well as the construction of a truth table. The scope includes homework-related queries and technical explanations regarding digital logic design.

Discussion Character

  • Homework-related
  • Technical explanation
  • Debate/contested

Main Points Raised

  • One participant asks how to design a 2 to 4 decoder using a 4 to 16 decoder and presents a truth table with inputs A and B.
  • Another participant questions the correctness of the truth table, noting that it does not show the associated outputs for the given inputs.
  • A participant provides a corrected truth table format, associating outputs O0 through O3 with the respective input combinations of A and B.
  • There is a request for the datasheet of the 4 to 16 decoder to clarify input labeling and significance.
  • One participant suggests that the inputs may be labeled from least significant to most significant, leading to a different interpretation of the truth table.

Areas of Agreement / Disagreement

Participants do not reach a consensus on the correctness of the initial truth table, and there are competing interpretations regarding the significance of the input bits and the associated outputs.

Contextual Notes

There are limitations regarding the assumptions made about the input labeling and the outputs of the decoder, as well as the absence of a datasheet for reference.

Fatima Hasan
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Homework Statement


How to design a 2 to 4 Decoder using 4 to 16 Decoder ?

Homework Equations


-

The Attempt at a Solution


Capture.png

Truth Table :
A B
0 0
0 1
1 0
1 1 ( O3)
Is my answer correct ?
 

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Do you have the datasheet for this device? Is A the high bit, or low bit? The way you show your truth table, it looks like A is the High bit.
Where do you want to read the 4 outputs? From Q(0) through Q(3)?

My initial observation is: your truth table is incorrect, because it only show inputs (A and B). You do not show what outputs are associated with these states.
 
A B - OP
0 0 - O0
0 1 - O1
1 0 - O2
1 1 - O3
 
scottdave said:
Do you have the datasheet for this device?
No.
scottdave said:
From Q(0) through Q(3)?
Yes.
 
There are several manufactured 4 to 16 decoders, like this one for example http://www.ti.com/lit/ds/symlink/cd74hc4515.pdf
Note the inputs on that one (and several that I searched) are labeled A0 (least significant) to A3 (most significant bit). This leads me to "guess" that A in yours is least significant, then B, then ( C & D , which are grounded so they are fixed to zero). How would a truth table look like in that situation?
 

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