[Digital Systems]NAND-Gate Implementation

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In summary: Registers are like variables in a digital system, they can store information temporarily and they can be read directly. Flip floop are essentially inverters, they just have the opposite polarity of your normal inverters.
  • #1
asd1249jf

Homework Statement


For the output function Z=A'C+BC'

Where A,B,C are inputs and A',B',C' are the complements of the inputs respectively

Implement the design using only NAND GATES


Homework Equations


K-Map, maybe?


The Attempt at a Solution


I haven't taken digital system design course in years, so I don't even know where to start this problem. Can somebody start me off with some hints then I'll attempt the problem?
 
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  • #2
this one is pretty simple. You don't need to worry about K-Maps because K-Maps are for simplifying messy boolean expressions. The expression you have, Z=A'C+BC' is a very simple one.

In practice, constructing a digital circuit is cheapest by implementing it using only NAND gates, so I guess the idea is to show you how it's done.

Basically each component, NOT, OR, AND, can each be made up of an assortment of NAND gates. All you do is put little blocks of these NAND gate configurations together the same as you would with regular NOT, OR, and AND gates.

Here's a good quick tutorial on it:
www.colchsfc.ac.uk/electronics/pdf_files/Doing it All With NAND Gates and NOR Gates.pdfHope this helps.
 
  • #3
verd said:
this one is pretty simple. You don't need to worry about K-Maps because K-Maps are for simplifying messy boolean expressions. The expression you have, Z=A'C+BC' is a very simple one.

In practice, constructing a digital circuit is cheapest by implementing it using only NAND gates, so I guess the idea is to show you how it's done.

Basically each component, NOT, OR, AND, can each be made up of an assortment of NAND gates. All you do is put little blocks of these NAND gate configurations together the same as you would with regular NOT, OR, and AND gates.

Here's a good quick tutorial on it:
www.colchsfc.ac.uk/electronics/pdf_files/Doing it All With NAND Gates and NOR Gates.pdf


Hope this helps.

(Hits head) Of course, Demorgan's!

Ok so basically

Z = A'C+BC'

Setting A'C = X, BC' = Y

Z = X + Y
Z' = (X'Y')'
Z' = [(A'C)'(BC')']'

Since DeMorgan's theorem gives Z', for Z, just make an inverter at the end to complement the function. Is this a valid solution?
 
  • #4
You can use NAND gates to make up all of the other gates. The way I look at it is like blocks, I just put them together and cancel redundant gates when everything is assembled.

I made the following to illustrate what I'm trying to say:
http://img36.picoodle.com/img/img36/9/9/3/f_logicdiagram_f42f88a.jpg


Hope this helps
 
  • #5
why u remove implements in last step?
 
  • #6
awais bashir said:
why u remove implements in last step?

two inverters cancel out each other.
in other words, if you have a's complement's complement, that's just a itself!
 
  • #7
what are registers& and flip floop..and difference b/w them.?
 

1. What is a NAND-Gate and how does it differ from other logic gates?

A NAND-Gate, short for "Not AND" gate, is a digital logic gate that outputs a low signal (0) only when both of its inputs are high (1). This means that it behaves as the opposite of an AND-Gate. Other logic gates have different output conditions based on their specific function, such as AND, OR, and NOT gates.

2. How is a NAND-Gate implemented in digital systems?

NAND-Gates can be implemented using various electronic components such as transistors, diodes, and resistors. These components can be arranged in a specific way to create the logic function of the NAND-Gate, which can then be integrated into a larger digital system.

3. What are the advantages of using NAND-Gate implementation in digital systems?

NAND-Gates have several advantages in digital systems, including their simplicity and versatility. They can be used to create any other logic function, which reduces the number of components needed in a system. They also have a fast response time and can be used in both sequential and combinational logic circuits.

4. Are there any limitations to using NAND-Gate implementation in digital systems?

One limitation of NAND-Gate implementation is that it requires a larger number of transistors compared to other logic gates, which can increase the cost and complexity of a system. Additionally, NAND-Gates can only output a low signal when both inputs are high, which may not be suitable for certain logic functions.

5. How has NAND-Gate implementation evolved in recent years?

With advancements in technology, NAND-Gate implementation has become more efficient and compact. The use of integrated circuits has allowed for the integration of multiple NAND-Gates onto a single chip, making them more cost-effective and space-saving. Additionally, the development of more advanced logic gates has reduced the need for using multiple NAND-Gates in a system.

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