Why Does Id Increase with Constant Vgs Despite Body Effect?

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SUMMARY

The discussion centers on the relationship between drain current (Id) and body effect in NMOS transistors. It is established that as the source-bulk voltage (Vsb) increases, the threshold voltage (Vt) also increases, leading to a decrease in Id when gate-source voltage (Vgs) is held constant. Participants confirm that increasing Vsb can effectively turn off the transistor by raising Vt above Vgs, resulting in Id approaching zero. This conclusion clarifies the misconception regarding the behavior of Id under these conditions.

PREREQUISITES
  • Understanding of NMOS transistor operation
  • Knowledge of threshold voltage (Vt) and its impact on drain current (Id)
  • Familiarity with the body effect and its influence on transistor characteristics
  • Basic grasp of gate-source voltage (Vgs) and source-bulk voltage (Vsb)
NEXT STEPS
  • Study the mathematical model of NMOS transistors, focusing on Id = k(Vgs - Vt)²
  • Explore the implications of body effect on other types of transistors, such as PMOS
  • Learn about the effects of temperature on threshold voltage and drain current
  • Investigate circuit design techniques to mitigate the impact of body effect in integrated circuits
USEFUL FOR

Electrical engineers, semiconductor device designers, and students studying transistor behavior and circuit design will benefit from this discussion.

salil87
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I found on my notes that for an NMOS with increase in Vsb voltage Body Effect increases, Vt also increases. But it is mentioned that with Vgs constant id increases which I feel is wrong since id is proportional to (Vgs - Vt)2. Hence I think id should decrease. Please show me the light :-)

Thanks
Salil
 
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I think your notes are wrong. I would also expect Id to decrease with increasing Vsb for a fixed Vgs and assuming the transistor is limiting factor for the drain current.
 
Actually, I just thought of a quick way of mentally verifying this. Since Vgs is fixed, you can solve for the Vsb to make Vth above Vgs. This would make Id zero as the FET would be off. Since you can always increase Vsb to make Id=0 by increasing Vth for any fixed Vgs (in the mathematical model anyway) you should conclude increasing Vsb reduces Id.
 
Great... thnks a lot for the confirmation :-)
 

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