- #1

cgiustini

- 11

- 0

My simplistic derivation below for a Class A amplifier shows that an AC signal at the input produces DC, fundamental, and 2nd harmonic terms at the output. This seems to contradict most the information I have found on this - which just states that the output is sinusoidal and of the same frequency as the input without any explanation of the details. Can anyone explain why my derivation below is wrong? Is the output of an ideal Class A amplifier always a DC-shifted sinusoid that has the same frequency as the input? Or does it have other terms as shown below?

In the case of electronic amplifiers using NMOS transistors to amplify AC signals, the AC input x(t) is applied to the gate-to-source voltage. Assuming we are using a Class A amplifier, the voltage at the gate is some Vgs(t) = Vbias + x(t) with Vbias and x(t) such that Vgs(t) never goes below the transistor operating threshold Vt. We also always assume that the transistor is operating in the saturation region.

Using an external circuit to the transistor (see attached diagram), we can say that the drain voltage is equal to: Vds(t) = Vdd - Id(t)*RL, where Vdd is power supply, Id(t) is transistor drain to source current, and RL is load resistance. Because the transistor is always assumed to be in saturation, we can write Id(t) = k*(Vgs-Vt)^2 (where k is some proportionality constant). Thus, plugging this equation into the equation for Vds yields: Vds(t) = Vdd - k*(Vgs-Vt)^2*RL = k*RL * (Vbias - x(t) - Vt)^2 = k*RL*(x(t)^2 + (Vbias-Vt)^2 + 2*(Vbias-Vt)*x(t)). Using this model and assuming that x(t) represents a sinusoid, the output Vds(t) contains DC, fundamental, and 2nd harmonic terms for x(t) --> is this interpretation correct?

In the case of electronic amplifiers using NMOS transistors to amplify AC signals, the AC input x(t) is applied to the gate-to-source voltage. Assuming we are using a Class A amplifier, the voltage at the gate is some Vgs(t) = Vbias + x(t) with Vbias and x(t) such that Vgs(t) never goes below the transistor operating threshold Vt. We also always assume that the transistor is operating in the saturation region.

Using an external circuit to the transistor (see attached diagram), we can say that the drain voltage is equal to: Vds(t) = Vdd - Id(t)*RL, where Vdd is power supply, Id(t) is transistor drain to source current, and RL is load resistance. Because the transistor is always assumed to be in saturation, we can write Id(t) = k*(Vgs-Vt)^2 (where k is some proportionality constant). Thus, plugging this equation into the equation for Vds yields: Vds(t) = Vdd - k*(Vgs-Vt)^2*RL = k*RL * (Vbias - x(t) - Vt)^2 = k*RL*(x(t)^2 + (Vbias-Vt)^2 + 2*(Vbias-Vt)*x(t)). Using this model and assuming that x(t) represents a sinusoid, the output Vds(t) contains DC, fundamental, and 2nd harmonic terms for x(t) --> is this interpretation correct?