How can I compare bits and perform bit shifts in SystemVerilog?

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Hi, i am trying to do a bit shift in systemverilog and compare the bit. For example:
i give a input A=011. Then the input will compare with another digital that i have already setup in fsm like 010. Now it will do the compare,
0 to 0---> bitmatch=1
1 to 1 ---> bitmatch=1
1 to 0 ---> bitmatch=0

How can i do the bit shift in here? i did some research in google it say i can use >> for right shift but it will gives a 0 bit on the other side. what i want is just compare it bit by bit and go to next stage.

Thanks for the help
 
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hoheiho said:
Hi, i am trying to do a bit shift in systemverilog and compare the bit. For example:
i give a input A=011. Then the input will compare with another digital that i have already setup in fsm like 010. Now it will do the compare,
0 to 0---> bitmatch=1
1 to 1 ---> bitmatch=1
1 to 0 ---> bitmatch=0

How can i do the bit shift in here? i did some research in google it say i can use >> for right shift but it will gives a 0 bit on the other side. what i want is just compare it bit by bit and go to next stage.

Thanks for the help

Your question is rather unclear. And I have no idea what's a systemverilog.

But if you have 011 and 010 as input and want to get 110 as output, then you can first XOR the 2 inputs & then NOT the result of the XOR.

In C or C++.

a = 011;
b = 010;
result = !(a ^ b);
 
Sorry for the unclear question. let say it like:
I got 3 digital;A, B and C. A is input which is 011. B and C are the define value in the code which is 010 and 110. I need to compare A with B and C to see how many bit are matched. First, compare A with B of their first bit from left to right.
0 compare with 0---> bitmatch=1
1 compare with 1 ---> bitmatch=1
1 compare with 0 ---> bitmatch=0
In this part, i have to do the "bit shifting" ; B's first bit compare with A's first bit. Then B's second bit compare with A's second bit.
My question is how can i do the bit shifting?
 
hoheiho said:
Sorry for the unclear question. let say it like:
I got 3 digital;A, B and C. A is input which is 011. B and C are the define value in the code which is 010 and 110. I need to compare A with B and C to see how many bit are matched. First, compare A with B of their first bit from left to right.
0 compare with 0---> bitmatch=1
1 compare with 1 ---> bitmatch=1
1 compare with 0 ---> bitmatch=0
In this part, i have to do the "bit shifting" ; B's first bit compare with A's first bit. Then B's second bit compare with A's second bit.
My question is how can i do the bit shifting?

What you describe is not called "bit shifting" - it's just bit comparison. My original reply gives you a way of comparing bits the way you way. Bitwise XOR A & B and the NOT the result. You will get 1 in all positions where the bits are the same & 0 in all positions where the bits are different.

A = 011
B = 010

result = A XOR B (A^B) = 001
NOT result (!result) = 110
 
hoheiho said:
See how many bit are matched.

phiby said:
a = 011;
b = 010;
result = !(a ^ b) = 110;

Assuming you want to count the number of bits that match, you don't need to shift. Start off with phiby's example:

Code:
    bits = !(a ^ b);             /* bits = not (a xor b) */
    count = 0;
    while(bits != 0){            /* count # of 1 bits */
        count += 1;
        bits = bits & (bits-1);  /* bits = bits and (bits - 1) */
    }                            /*  clears the right most 1 */
                                 /* count = # matching bits */
 
thanks for the reply
sorry for i didnt say it clear again
I have to return to the starting part immediately when the bitmatch is 0. For example:

A = 011
B = 001

0 compare with 0 (i) ---> bitmatch=1
1 compare with 0 ---> bitmatch=0
Now compare the last bit of A which is 1 to the first bit of B which is 0

If i use the way of u guys suggested, it will finish the whole digital then back to the first part (i). But not back to part (i) immediately when bitmatch is 0
 
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If this is verilog (circuit design language), can't you just use three 1 bit registers to hold the value for A and another set of three 1 bit registers to hold the value for B? In this case you can grind out the logic with a series of matrix like paths and gates.

It still isn't clear what you're trying to accomplish.
 
rcgldr said:
If this is verilog (circuit design language), can't you just use three 1 bit registers to hold the value for A and another set of three 1 bit registers to hold the value for B? In this case you can grind out the logic with a series of matrix like paths and gates.

It still isn't clear what you're trying to accomplish. Are you searching B for a bit pattern in A?

I can use 3 stages to hold 3 bit and do the compare. And this is what i did before like A = 0 0 1
S1 = 0, S2 = 0, S3 = 1. If i do this i got around 300 stages after because there are some more bit i need to compare after.

Now my idea is use A to hold 1 digital (001). And compare the input with A bit by bit (left to right). My problem is how to compare the input 1 with the bit in A? I try to use A[2] to get the second bit in A. But it doesn't work. my idea is :
A [0] -->compare with input
A [1] --> compare with input
and so on

i hope i make it clear now
 
So that I can understand what your trying to do, consider A,B,C as a 9 bit index into a 512 entry lookup table. Yes it's a huge number of gates, but then I could understand what you're trying to do. You only need to show a few key seuqences:

table[A,B,C] = [? ? ? ? ? ? ? ? ?]

table[000 000 000] = [? ? ? ? ? ? ? ? ?]
table[000 000 001] = [? ? ? ? ? ? ? ? ?]
table[000 000 010] = [? ? ? ? ? ? ? ? ?]
...
table[111 111 111] = [? ? ? ? ? ? ? ? ?]

How many bits are in each entry in the table?
 
rcgldr said:
So that I can understand what your trying to do, consider A,B,C as a 9 bit index into a 512 entry lookup table. Yes it's a huge number of gates, but then I could understand what you're trying to do. You only need to show a few key seuqences:

table[A,B,C] = [? ? ? ? ? ? ? ? ?]

table[000 000 000] = [? ? ? ? ? ? ? ? ?]
table[000 000 001] = [? ? ? ? ? ? ? ? ?]
table[000 000 010] = [? ? ? ? ? ? ? ? ?]
...
table[111 111 111] = [? ? ? ? ? ? ? ? ?]

How many bits are in each entry in the table?
thanks for the help

i know how to work it out now
 
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