# How to think about ground planes

The ripple is a valid model. Yungman refers to the idea that current flows in loops. This latter view is true at longer time scales. The ripple reaches the cap at the power supply and there is a reflected wave through the low impedance of the cap. This is Yungman's current loop beginning to form.

For very high frequency work the ripple concept applies. If the rise time of the pulse is much longer than the physical extent of the board vis-a-vis the speed of light, then you won't be able to resolve the pond ripples; you'll simply see the closed current loops Yungman described.

Can you explain in theory about the ground plane ripple like stone drop in a pond that spread to all sides?

We assume there is bypass cap as in #5, we are talking about higher frequencies that the small 0.01uF bypass cap cannot even cover.

Well the small cap should be covering the highest frequencies best unless it is too far or otherwise has too much inductance.

Basically, suppose you got two planes, like, a planar capacitor. One is ground plane other is vcc plane. Charged to some voltage. If you short the ground plane and vcc plane in one point you will get expanding circle of low voltage from that point. It is electromagnetic wave and it will (AFAIK) travel at the speed of light in the dielectric material (so we are speaking very high frequencies here, very rapid pulse risetimes. 1 light-nanosecond is 30 centimetres). It will also reflect off all the edges, and off capacitors you can have connected. It is fairly straightforward to simulate on computer. The equation for conductive plane is not too complicated, you just do the electromagnetic field between the plates and current in the plates. You do end up with equation much similar to elastic plane that can have free ends or be attached in some points. Not quite like a pond but kind of similar.

I'm not sure how much ripple can a chip generate. You'll have capacitors across any high speed chip like that, and probably it's own dedicated dc-dc converter as well.

When you don't have vcc plane but vcc wires, the behaviour gets more complicated but it will still generate electromagnetic waves through the ground plane outside the overlap area, I believe. It is hard to visualize in that case, I'd rather research literature on that. In principle one could solve this for a strip over a plane.

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What did you think of the argument in #22?

I was thinking specifically of this case. Part of the current loop is a vector directly from point A to point B in the ground plane. In order to for a ripple around A to occur, there must be one ray that is in the exact opposite direction of this vector. But how does this current turn around to get back to B in a uniform impedance, which is what a ground plane is supposed to be.

I think there is two different scenarios that one has to distinguish. I am very sure about scenario (a). But I am just guessing about scenario (b).

a) Only ground plane and power trace: In this case, the ground current ABSOLUTELY follow the trace of the power trace. This is exactly like a microstrip where the image current follow the trace current. This is because it's the EM wave that travel and the surface current is only the consequence of the boundary condition. If you look at any of the EMC books, you will find that. There is no if and buts about it.

b) If you have both a power and ground plane next to each other and form a big capacitor, then the theory get complicated as which path the current take. There is still two cases:

Case b1 where there is no bypass cap around between the two planes and your di/dt happen at point A and the power source and sink at point B. My guess is described in post #14 where the EM field is a vector field look like the field lines of an electric dipole where it actually starts out radiating in ALL direction like ripple in a pond....BUT it quickly start changing direction because of the path of least resistance.

Case b2 where there are good bypass caps throughout the board. In this case, my guess is still the current take on the path of least resistance. But in this case the path might be where the closest bypass caps are, so the current density might be "stared" out reaching towards the few closest bypass cap.

Well the small cap should be covering the highest frequencies best unless it is too far or otherwise has too much inductance.

Basically, suppose you got two planes, like, a planar capacitor. One is ground plane other is vcc plane. Charged to some voltage. If you short the ground plane and vcc plane in one point you will get expanding circle of low voltage from that point. It is electromagnetic wave and it will (AFAIK) travel at the speed of light in the dielectric material (so we are speaking very high frequencies here, very rapid pulse risetimes. 1 light-nanosecond is 30 centimetres). It will also reflect off all the edges, and off capacitors you can have connected. It is fairly straightforward to simulate on computer. The equation for conductive plane is not too complicated, you just do the electromagnetic field between the plates and current in the plates. You do end up with equation much similar to elastic plane that can have free ends or be attached in some points. Not quite like a pond but kind of similar.

I'm not sure how much ripple can a chip generate. You'll have capacitors across any high speed chip like that, and probably it's own dedicated dc-dc converter as well.

When you don't have vcc plane but vcc wires, the behaviour gets more complicated but it will still generate electromagnetic waves through the ground plane outside the overlap area, I believe. It is hard to visualize in that case, I'd rather research literature on that. In principle one could solve this for a strip over a plane.

Actually if Vcc is a wire, it is a lot simpler as I explained using microstrip image current in post #28. The ground current just follow under the Vcc trace. There will be no stone in the pond. This is the whole base of EMC.

Regarding to case that have Vcc and Ground plane, remember the total energy of a di/dt pulse is constant, as the EM vector field radiate out, the magnitude decrease with distance, it is not like a pond even in your scenario of capacitor without any other source and sink point. With any bypass cap, my guess is the current density will follow the path of the least resistance which is the shortest point to the bypass cap, so it is again not like a pond.

The ripple is a valid model. Yungman refers to the idea that current flows in loops. This latter view is true at longer time scales. The ripple reaches the cap at the power supply and there is a reflected wave through the low impedance of the cap. This is Yungman's current loop beginning to form.

For very high frequency work the ripple concept applies. If the rise time of the pulse is much longer than the physical extent of the board vis-a-vis the speed of light, then you won't be able to resolve the pond ripples; you'll simply see the closed current loops Yungman described.

I have been thinking about your comment about the difference between a steady state ( long time scale as you said) vs a one shot reaction. I start to question this. Yes, I am looking at the point of view of RF or EM more in a continuous event where the di/dt occurred continuously as is most of the case in real life. It is like a series of pulses, not necessary at regular interval but is a continuous event. But you got me thinking about what if there is only one disturbance.

I believe if the Vcc is a trace and only ground plane exist, my theory of microstrip and image current still exist as this is still the only guide structure for EM wave to propagate.

BUT if you consider a full power and ground plane like a parallel plate capacitor, I start to question the one shot effect. I don't even know how to simulate this. Can you give us some reference on your assertion? This is getting very interesting.

I would also regard the 'pond ripple' analogy to be reasonable, but also that it is incomplete. When a switch opens up, it is allowing electrons to flow. That flow is motivated by a difference of potential between one location and another. The question, then, is whether the current is motivated by a potential some distance away, or a potential right next to that space. Logically it is the latter. Electrons will move locally, then further electrons will flow into the space they've left behind. They don't all flow like soldiers on parade, all at once to the sound of someone shouting an order, they flow like cars pulling off from traffic lights with each responding to the one next to it.

This is why you get overshoot, similarly. The electrons are all racing forwards and the switch is thrown open and they all crash into the back of each other like tailgaters on the motorway. They're real dumb, those electrons! Not a single brain cell between them!!

OK, so what bit is incomplete? Well, this all happens on a timescale so short, relative to a PCB, that you're talking nanoseconds and miniscule levels of charge. If this was the only effect, it'd not be very significant.

But the thread so far has generally missed a discussion on the impedance of the circuit back to the sink/source. This is what will dominate the behaviour of the RF currents on the plane. If those dumb electrons aren't given a real obvious route to follow, a big wide freeway where they are able to rush down without getting into one of those phantom traffic jams where the traffic just seems to pile up for no particular reason except for weight of traffic - yes, all the physics of freeways applies to electrons too! So what happens in the picoseconds after your 'pond-drop' then becomes more significant - as oscillations set in across the plane, they will then cause degradations in the digital signals, pulling the signals up or down a little so as to reduce the s/n.

Therefore, adding 'splits' in a ground plane is not something to be considered in isolation to the rest of the board design, and EMC components - if it diminishes the impedance to source/sink then it may lead to resonances that may be more degrading on the digital signal than just the initial analogue pulse alone. There again - it might not be!! At least your friend's analogy should give you an insight into where and why EMC capacitors might be best located, and to keep fast switching close to the source and sink [viz. shortest loops with the smallest internal area 'within' the loop].

I would also regard the 'pond ripple' analogy to be reasonable, but also that it is incomplete. When a switch opens up, it is allowing electrons to flow. That flow is motivated by a difference of potential between one location and another. The question, then, is whether the current is motivated by a potential some distance away, or a potential right next to that space. Logically it is the latter. Electrons will move locally, then further electrons will flow into the space they've left behind. They don't all flow like soldiers on parade, all at once to the sound of someone shouting an order, they flow like cars pulling off from traffic lights with each responding to the one next to it.
But it is really the EM wave propagate out, the electrons really do not move as they are moving at many dimensions slower.
This is why you get overshoot, similarly. The electrons are all racing forwards and the switch is thrown open and they all crash into the back of each other like tailgaters on the motorway. They're real dumb, those electrons! Not a single brain cell between them!!

OK, so what bit is incomplete? Well, this all happens on a timescale so short, relative to a PCB, that you're talking nanoseconds and miniscule levels of charge. If this was the only effect, it'd not be very significant.

But the thread so far has generally missed a discussion on the impedance of the circuit back to the sink/source. This is what will dominate the behaviour of the RF currents on the plane. If those dumb electrons aren't given a real obvious route to follow, a big wide freeway where they are able to rush down without getting into one of those phantom traffic jams where the traffic just seems to pile up for no particular reason except for weight of traffic - yes, all the physics of freeways applies to electrons too! So what happens in the picoseconds after your 'pond-drop' then becomes more significant - as oscillations set in across the plane, they will then cause degradations in the digital signals, pulling the signals up or down a little so as to reduce the s/n.

Therefore, adding 'splits' in a ground plane is not something to be considered in isolation to the rest of the board design, and EMC components - if it diminishes the impedance to source/sink then it may lead to resonances that may be more degrading on the digital signal than just the initial analogue pulse alone. There again - it might not be!! At least your friend's analogy should give you an insight into where and why EMC capacitors might be best located, and to keep fast switching close to the source and sink [viz. shortest loops with the smallest internal area 'within' the loop].

I am curious about this whole thing but my grandson is here and I have to go out. So I just response to one point first.

I want to make sure you are talking about the case of having both power and ground plane. The case with only ground plane and a power trace is very obvious even in the one shot case because the EM wave can only propagate in a guided structure which is the power trace on top of the ground plane. There will be not rock into a pond at all. All you get is the current density on the ground plane follow the power trace. This is what I refer to as microstrip.

So for two plane case, how do you explain in terms of EM wave as this is really what is happening. I have no idea.

Yes I do agree with you for the single event that it is not obvious that the front of the EM wave see equal potential in all direction ( as it is equal potential at all points between the two planes before the event happen). Therefore the EM wave do not see the source potential from far away. EM wave only see the immediate surrounding and is equal in all direction. It is only want you establish a steady state before you can see the source point as the surface current desity due to the H field establish a slight potential difference along the path.

I still believe even when the EM wave propagate out like rock into a pond at the begining, it will die down fast as the energy of the single di/dt event is finite, so the energy of the EM wave at a given point has to decrease with distance.

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Hi everyone, I just discovered this forum. I am very interested by this topic and pleased by the depth of the resulting discussion. I remember when it dawned on me that current should travel back along a path under a trace like a stripline, it was a great step forward for me.

I wouldn't say that I'm incredibly knowledgeable about this, but I see it like this: the most important thing is the speed of light. Because of relativistic effects, accelerating charges "induce" the opposite motion in other nearby charges. This is responsible for what we observe as Magnetic Coupling. The result is exactly what has been stated by the others who have replied: in the case of a ground plane and a power trace, an EM spike caused by very fast switching will move back along the supply trace together with a mirror image traveling with it along the ground plane to the source.

So what happens if there is a slot or gap that disrupts the path of the mirror image current, which wants to follow as close as possible to its twin on the supply trace? It kind of has to take a detour around the gap, trying to get to the other side of the gap so it can rejoin its mirror image on the supply trace, possibly trespassing where it doesn't belong. Also, since now that current is not traveling with an equal and opposite wave on the other side of the board, it radiates! That is bad news. I can see why experienced designers like those who have commented on this post avoid discontinuous ground planes.

Concerning the ripples in a pond part of the question, I do believe that a wave will emanate front the plus and minus pins just like ripples in a pond, BUT(!!) since you are a very smart designer and you have put a bypass cap as close as possible to the supply pins, due to the fact that the cap represents a small impedance, when the wave reaches the short distance to the cap a negative reflection of the ripple is superimposed on top of the original, almost completely neutralizing it. The closer the cap is to the pins, the better, because the points of origin will be closer in space and time. I imagine that is why you are unlikely to observe any evidence of that ripple like effect.

I've never used more than a 2 layer board for my designs but I am going to favor 4 layers from now on due to the comments that others have left here, which have definitely helped my understanding of this. (I am still going to separate AGND and DGND with a thin trace or choke though, as per manufacturer's recommendations.)

Here's a question: if you had to chose which section you put closest to an off-board connection to a power supply, would you put it closer to the analog or digital section? I think digital?

Well come to the Physics forum.

I think in ideal condition, separate ground has the advantage. But like what you said about a slot, if anyone want to do separate ground, they better like at each trace inch by inch on the layout to make sure there is no cross over the the other ground. My experience it is much more difficult said than done. Books show an IC with digital and analog side separated nicely. But in real life, you have a bunch of ICs that have AGND, DGND, AVcc and DVcc. try cutting the ground plane is more difficult than you think and on top your digital and analog traces has to run on top of their corresponding ground. I layout all my own critical boards, don't listen to me, just do one!!!

Particular I described in detail about the image current stay right under the trace, you separate by a few trace width ( depend on the thickness of the dielectric), you hardly get any interference. Why do I want to separate the ground?

My posts all assume at frequency that even the 0.01uF bypass cap is running out of steam. So I don't not assume a well placed bypass cap will solve everything. As you can see the current path get complicated on those with power and ground plane. My way of dealing with this is place the two planes only 5mils apart to increase the capacitance so it pickup where the 0.01uF cap poop out. Also for RF amplifiers, I actually put a copper pour on the Vcc pin on the side that is on top of the ground plane and literally create a parallel plate cap just for that IC. I don't trust the 0.01uF cap.

the EM wave can only propagate in a guided structure which is the power trace on top of the ground plane. There will be not rock into a pond at all. All you get is the current density on the ground plane follow the power trace. This is what I refer to as microstrip....when the EM wave propagate out like rock into a pond at the begining, it will die down fast as the energy of the single di/dt event is finite, so the energy of the EM wave at a given point has to decrease with distance.

yungman, I think the element in need of discussion here is your perception of 'a propagating wave'. Within the planes of a PCB, they may act as a waveguide, but most certainly not a propagating wave. EM energy within a waveguide may propagate in several possible modes, maybe even several such modes together. This is a combination of currents and magnetic fields, the magnetic fields, obviously, within the space between planes but the currents are real, physical surface currents on the conductors, and are the current under discussion when it comes to talking about what RF currents are present on planes. (Currents, which I may add, do not simply disappear at the plane edge but are variously reflects and/or are carried over onto the other side of the plane - which might then be a radiating surface if it is the last one in the stack.)

Your latter point is all-important. A system in which such guided waves do not damp quickly may result in evident interference. A single solitary pulse that damps/dumps its energy straight to ground might [if that is possible], in theory, have an interfering effect but I think it is unlikely in the most part (for what we'd regard as 'consumer' level electronics).

Mirror currents between planes, or a plane and a track, therefore need to dissipate promptly. The interference comes when those mirror currents are inhibited by impedances back to its source (they are currents on the circuit associated with that part). If they do not, then that energy may bounce around for a while, generating interference at any resonant frequencies associated with it bouncing around, which would be a function of the geometry/termination impedances.

Therefore, these surface currents may, harmlessly, appear on either the analogue or digital planes [and also to note - either on +ve or -ve planes] providing those planes have low impedance to source. IF surface currents appear on a plane or a track that is not connected to source by a low impedance - particularly for example a signal track (analogue or digital) that terminates in some form of detector circuit - then that energy in that impromptu waveguide is likely to bounce around for a while with nowhere to sink to.

A big problem with all this is that at very high frequencies, of the order of board-dimension wavelengths, a 'simple' direct DC low resistance to source may not be enough to prevent resonances. The reason decoupling capacitance might then help might, alternatively [rather than simply regarded as 'high-pass coupling'], be seen to be tuning the frequencies such that the resonances of the board do not match up with frequency content of any likely induced surface currents.

It should not be a surprise, then, that PCB EMC can easily enter the world of the 'dark arts' if the basics have not been got right in the first place, because a failing board might be made to work again with a little nibble of a plane here, a little thicker track there, or a new component value, and although computer simulations have come a long way such subtleties are usually not well-simulated.

yungman, I think the element in need of discussion here is your perception of 'a propagating wave'. Within the planes of a PCB, they may act as a waveguide, but most certainly not a propagating wave. Any source of disturbance will cause an EM wave to propagate out in a guided structure.
EM energy within a waveguide may propagate in several possible modes, maybe even several such modes together. This is a combination of currents and magnetic fields, the magnetic fields, obviously, within the space between planes but the currents are real, physical surface currents on the conductors, and are the current under discussion when it comes to talking about what RF currents are present on planes. (Currents, which I may add, do not simply disappear at the plane edge but are variously reflects and/or are carried over onto the other side of the plane - which might then be a radiating surface if it is the last one in the stack.)

First you need to clarify where you are talking about Vcc plane or Vcc trace. I believe:

1) Either way, the di/dt is going to propagate out as TEM wave as the dielectric thickness is most likely much much smaller than the wave length of the highest frequency component. And it propagates.
2) The current on the surface is formed as the consequence of boundary condition of the tangential H wave. It is every bit real current as you can measure it. But it is not what the conventional current that the electrons flow from one end of the wire to the other end. Real electrons move too slow for that. Yes when an EM wave got reflected back, boundary condition again, will create surface current density as if the current reflected back. But again, it is the consequence of the boundary condition even though it is every bit a real current.
3) In the Vcc plane case with no bypass cap or any other low impedance return point, I don't disagree about when current reach the edge of the board, it reflect back as the impedance hit the air boundary which is 377Ω. Part of the EM wave radiate into the air from the edge of the board, but this is not in the scope of the discussion. Most EM wave reflected back and cause the reflection. But with any bypass cap in the board, it provide a low impedance path and the wave patent get complicated.

4)
Your latter point is all-important. A system in which such guided waves do not damp quickly may result in evident interference. A single solitary pulse that damps/dumps its energy straight to ground might [if that is possible], in theory, have an interfering effect but I think it is unlikely in the most part (for what we'd regard as 'consumer' level electronics).
Mirror currents between planes, or a plane and a track, therefore need to dissipate promptly. The interference comes when those mirror currents are inhibited by impedances back to its source (they are currents on the circuit associated with that part). If they do not, then that energy may bounce around for a while, generating interference at any resonant frequencies associated with it bouncing around, which would be a function of the geometry/termination impedances.

I don't think reflection has been in the discussion. It is well know that reflection exist. But I believe there is a big difference between a system with Vcc plane vs Vcc trace. In Vcc trace case all reflection are confined between the Vcc trace and the ground plane right underneath as microstrip lines. EM wave follow the microstrip structure. In the case of Vcc plane that get complicated. Are you trying to say even in the case of Vcc trace, the ripple of the di/dt still ripple out like a stone in the pond? That I cannot agree, but of cause I don't claim I am the expert and know everything, I can just say this within the scope of my knowledge. If you have reference otherwise, I love to read it.

Therefore, these surface currents may, harmlessly, appear on either the analogue or digital planes [and also to note - either on +ve or -ve planes] providing those planes have low impedance to source. IF surface currents appear on a plane or a track that is not connected to source by a low impedance - particularly for example a signal track (analogue or digital) that terminates in some form of detector circuit - then that energy in that impromptu waveguide is likely to bounce around for a while with nowhere to sink to.
I agree it will bounce back and fore within the guided structure which is the trace in the Vcc trace case. Most will not bounce out of the guide structure.
A big problem with all this is that at very high frequencies, of the order of board-dimension wavelengths, a 'simple' direct DC low resistance to source may not be enough to prevent resonances. The reason decoupling capacitance might then help might, alternatively [rather than simply regarded as 'high-pass coupling'], be seen to be tuning the frequencies such that the resonances of the board do not match up with frequency content of any likely induced surface currents.

It should not be a surprise, then, that PCB EMC can easily enter the world of the 'dark arts' if the basics have not been got right in the first place, because a failing board might be made to work again with a little nibble of a plane here, a little thicker track there, or a new component value, and although computer simulations have come a long way such subtleties are usually not well-simulated.

I never even talk about reflection and standing wave pattern, I assume it exist. I am more talking about the pattern of the disturbance on the ground plane and nothing more. As this is very important for any trace that run over the disturbance. As long as the traces are not on the path of those disturbance, they can bounce back and fore for all I care.

I believe EM wave radiate out at the edge of the board in the Vcc plane case if it has not been stopped. But I don't think that would be a big problem as the impedance of the two planes guided structure is so much lower than 377Ω that most reflect right back into the board. EM radiation also exist in Vcc trace just like microstrip still radiates into the air as it is not a perfect wave guide and other modes of propagation can exist if the given frequency is high enough.

But as I said, if you have article about this topics, I love to read it. My knowledge is mainly from EM books and RF books. EMC books give practical example where they more worry about interference in signal traces, not about bounce in two copper planes.

In real life case, this bouncing problem in Vcc plane case can mostly be avoided by:

1) Having 0.01uF in parallel with 100pF surface mount cap between the two planes close to the Vcc pin of the IC.
2) Design the stack up so the Vcc and GND plane are right next to each other, separated only by 5mils so they form a distributed cap to make an almost perfect bypass cap to frequency of wave length equal to 10 times the separation which is 50mils!!!
3) For very fast IC, I even put a copper pour on the side of the IC connect to the Vcc pin on top of the ground plane to create a cap of about 20 to 50pF cap.

I don't believe that this is black magic. It's all about whether you are interested in it and willingness to pursue it. From my experience, a lot of engineers don't like to deal with EMC. To them, it is boring and they rather get on with the circuit design. I am one of the odd balls that fascinated by EMC and I love pcb layout. I remember one of the company I worked for actually hired an EMC expert called Chris Kendell......I am not joking, he actually looked like Santa!!!! He hosted a two day class for us. I can see all the other people were kind of spaced out through out the session, I was about the only one that kept asking question and interacted with him. In another company, when I told the other engineers that I am very into EMC design, all they could say is "Thankyou thankyou!!!" To me, designing EMC is even more interesting than all the op-amp etc. Even in RF, my interest is mostly on designing filters, matching network using distributed elements so the board looks like a maze of copper line pattern rather than with lump components. I always insisted in laying out my own boards and it is not like those engineers sitting behind the pcb designer and use a stick to point at the screen. I layout out even an eight layer board with mixed signals, that contain processor, switching power supplies circuits, RF transmitter and various op-amps with USB and Firewire. This was done on 4 individual 1.5"X1.5" rigid FR4 with Dupont flex circuit in between them to form one long unit. You don't get more critical than this in EMC and crosstalk point of view. Never once I use cut ground plane. I proof this with real life successful circuit design and layout time after time. I am particularly interested in very dense mixed signal pcb design. And I am talking about laying out pcb from schematic to gerber files ready to sent to board house. This kind of pcb design make op-amp, ADC, DAC circuit design like cake walk.

There is always something new to learn. If you have articles on ripple in two plane setup, I would love to read it. I would like to get it right one day.

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