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How does this circuit *really* work: 2 transistor metronome

  1. Dec 14, 2013 #1
    I have some questions about this metronome (clicker) circuit found in Radio Shack's "Getting Started in Electronics" book. This circuit seems to be a popular one out on the internet(s) as far as metronome circuits go.

    Circuit: http://imgur.com/XyTasy3

    The other night I said to myself if I can't understand this circuit completely I shouldn't bother trying any further with electronics (given all my studying thus far). So here we are...

    Here's what I've done so far...
    I have successfully created the circuit on a breadboard. It works (and sounds) like a metronome adjustable via either the cap size or the pot.
    I get this on my scope by probing S (probe is grounded to battery negative):
    http://imgur.com/tRkuKDd (this is not actual.. i found this pic on internets but it's close... less frequent "hits"
    If I zoom in a lot, I see a nice waveform like this:
    http://imgur.com/Gi0g7te (that seems nice... like a nice gentle speaker friendly waveform)

    I have also somewhat (I think) successfully modeled/simulated it using Falstad's circuit designer:
    although the output on the virtual scope doesn't look like my real scope... and also, the only way I could get the cap to show discharged current flow was to get it to where it sometimes gives a convergence error...

    Ok... so here's what I understand so far (I think!):
    NOTE: I've been very confused by previous simulation attempts... so bear with me please! I'm also a little confused as I get different behavior if I deselect the "trapezoidal approximation" setting on the C1 (which is currently deselected), etc. At one point I was even getting into "reverse active mode" on Q2 which really threw me off for a while.

    The basic idea is that C1 yanks back the speaker (thus creating a "wave"... I'm really simplifying here) once it is full and becomes essentially a short and sucks all the current from the source. And Q2 (via Q1) always want to push the speaker "out" (or whatever direction).

    I believe the cap fills first because it's essentially a short until it reaches a certain voltage at which time Q1 will become forward biased. Or does fbias occur on Q1 immediately?

    I'm confused if/how Kirchoff's laws come into play regarding when Q1 will become forward biased regarding when the cap gets to a certain level.

    Also, I wish I could tell what the charge field is at the connection between Q1 and Q2 but I'm lost there. Is it simply the voltage drop after Q2? I'm really confused about this.

    I apparently never see a speaker pushed out (positive bias) during non hits (idle time).

    Sorry so long. I just wanted to get this thread going as I've been procrastinating due to needing to put the links together.

    Thanks for any help you can give!!
    Last edited: Dec 14, 2013
  2. jcsd
  3. Dec 14, 2013 #2
    One big question I have is why are 2 transistors necessary. Why couldn't Q1 be used alone. Apparently the whole C1 acting like a short circuit thing doesn't seem to happen without. I have no idea why.

    Also, I get really confused about which way the speaker cone is going (is it pushing out or pulling in) at whatever times. At one point it seemed as though the speaker would always be pushed out whenever the transistors were working but I didn't see any dc offset on the real scope.

    I do believe that the reason C1 wants to discharge is because of the current flowing out of Q1. I'm not sure exactly how, but I'm thinking it negates somehow the stored field in C1?
    Last edited: Dec 14, 2013
  4. Dec 14, 2013 #3
    I did learn by watching a recent youtube video on electronics that I may have TBS (Teflon Brain Syndrome). Something's not sticking with this stuff! :)
  5. Dec 15, 2013 #4
  6. Dec 15, 2013 #5
  7. Dec 15, 2013 #6


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    You can make this type of oscillator with only one transistor. The "legitimate" way to do it uses a unijunction transistor instead of a conventional type. See http://hyperphysics.phy-astr.gsu.edu/hbase/electronic/relaxo.html

    But you can get away with some common standard (BJT) transistors if you abuse them by running them outside of the conditions they were designed for. (in fact, the transistor base is not connected to anything!) The output is too low to drive a speaker at a reasonable volume, but the lower current needed to flash an LED works. You could use a second transistor as an amplifier to drive the speaker, but your circuit already does that. See the bottom of this page: http://members.shaw.ca/roma/twenty-three.html

    The basic reason why you need 2 transistors in the circuit you showed, is so the voltage on each end of the capacitor can change independently, to charge it first one way and then the other. With only one transistor, you don't have enough options available to do that.
  8. Dec 15, 2013 #7


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    This circuit is pretty subtle. Don't let your confusion let you consider quitting electronics!
  9. Dec 16, 2013 #8


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    The purpose of using 2 transistors in this arrangement is that it gives fast switching. The main current-carrying transistor, Q2, spends almost its whole time either fully on or fully off, with minmal time transitioning between those states. It is the intermediate state, where Q2 is neither fully on nor fully off where its power dissipation (meaning wasted power) is worst. By using positive fedback to ensure the switching is rapid, we create a circuit which is both fast and efficient, and Q2 can handle heavy currents bcause it is either off or in saturation, the states which cause it to dissipate minimal heat.
  10. Dec 16, 2013 #9


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    Good advice. Oscillators so often act like amplifiers, when you build them and amplifiers often act like oscillators. That's life.
    I believe that type of oscillator is referred to as a relaxation oscillator; it makes a characteristic Click each cycle. I remember making one which incorporated a further capacitor on the bias circuit. This created a very good siren sound as the volts on the bias capacitor varied after switch on. It was my front door 'bell' for many years.
  11. Dec 16, 2013 #10
    Ok so I think I've just about got this figured out (as much as my brain can take) given all the help from this threads responses and the other thread posted by Jony130 and the info over at the talkingelectronics site.

    So to beat this dead horse once again!

    Basically, the cap is getting charged both directions with DC and eventually (perhaps) reaches a state of blocking DC in both directions (at different times in the system). And the charge on the cap's left side (via the resistors) is a lot less than the one it gets on its right side via Q2's collector, generally speaking... or perhaps not since it is also competing with the speaker load now that I think about it.. .so perhaps they are similar charges. I'm not sure.

    Another thing I am confused about... is when current is flowing out of Q2s collector, does the current going to the cap pull the speaker back (i.e. voltage lift on the speaker inductor) or does that current go "out" to the cap and "out" to the speaker? i.e. pulling the speaker (finally) in a different direction than usual (via left side charging of the cap) to get some sense of actual speaker movement? Otherwise, I only see the speaker being "pushed out" and never pulled back at any point in the system.

    And I keep thinking when things are initially started (linear mode on the transistors i.e. ce current is flowing), the cap may or may not be fully charged and blocking on the left side. So either it may still be charging as it begins to get a counter current from Q2, or perhaps its fully charged at that point. I don't know if that matters. But either way, it is not acting like a short circuit 0v and getting a huge current via Q2 because it has a current charge via the left.. perhaps once it reaches equilibrium (left = right)?

    So as the cap gets a presumably a larger right side current via Q2 I guess that could be considered a "discharge" of the cap leftward? And in theory once it reaches an equilibrium of left side = right side (at some point) it would be 0v and thus a short circuit (partially minus the Q1 Vbe drop along with the speaker load)? Perhaps, assuming that is correct, it would matter as that would starve the speaker (sort of the same way Q1 base is starved via the cap being initially 0v), thus causing some speaker reaction "back"?

    Then I understand that the cap fills up and blocks dc from the right (Q2). That apparently slows things down very quickly in terms of transistor current.

    This also eventually starves Q1 base via the negative charge on the cap's left side and shuts down the transistors. Then the cap discharges to the right because there is path to ground thru the speaker?

    Then the cap is empty again and the cycle can repeat.

    Am I very far off base there??? I hope not too far at this point phew!

    Oh and thanks for the encouragement analogdesign and everyone else!
    Last edited: Dec 16, 2013
  12. Dec 17, 2013 #11
    When we first connect this circuit into supply. The C1 capacitor is initial discharge.
    So the voltage across capacitor is 0V (capacitor act just like a short circuit).
    Immediately after we power up the circuit. The current start to flow via R1 and R2 resistor. But because C1 capacitor is discharge (0V across capacitor) all this current will flow through C1 and speaker to ground. No current will flow into Q1 base and this is why Q1 and Q2 or OFF.
    But as you know voltage at charging capacitor start to rising. And when this voltage at pin X reach Q1 threshold voltage (about 0.6V) Q1 start to conduct a current. If Q1 start to conduct the Q2 all so immediately will start conduct current. This means the voltage on Q2 collector starts to rise (at point Y). And this rise in Y voltage is feedback to point X via capacitor C1.
    But as you know the voltage at Q1 base (point X) can not be higher then 0.7V because of the diode in the base-emitter junction Q1. This means that there will be a huge Q1 base current. Which will ensure that Q2 is in saturation region, and the voltage at point Y is close to 9V.
    Also at the same time C1 will quickly discharge C1 and then C1 will start recharged phase in the opposite polarity. All this will happens very quickly because of a large Q1 base current (charging current). Also at this phase the spearer "gives" a shot pulse of sound.

    The C1 was rapidly charged to V_C1 = Vcc - Vbe - Vce(sat) ≈ 8.6V So cap no longer conducts any current. So when C1 capacitor is full charged. The Q1 base current is provided only by R1 + R2 resistor. R1 + R2 don't provide enough base current on Q1 to keep Q2 in saturation region.
    So Q2 immediately after C1 is full charged comes out from saturation to the linear region.
    So voltage at Q2 collector is start to fall. And this drop in Y voltage again is feedback via C1.
    For example if voltage at point Y drops to 8.9V the voltage at Q1 base will also drop to 8.8-8.4V = 0.5V thanks to the positive feedback provided by C1 capacitor.
    So eventually C1 that was previously charged to 8.4V "pulls-down" the voltage on the Q1 below ground (-8.4V). So Q1 and Q2 will immediately goes into cut-off.
    And now C1 cap will act very similarity to a voltage source and start the discharge phase in the circuit:
    C1 right plate ---> speaker---> power supply ----> R1 + R1---> C1 "left" plate.
    Eventually cap will be full discharge (0V across the cap) but the current will still flow in the same direction and capacitor will start the charging phase, but I described this at the beginning.
    So the cap will charge to 0.6V ( left plate more positive than the right plate) and Turn ON Q1 and Q2 . Also notice that in this phase the speaker current is to small to produce any "loud sound" on the speaker.
    That is one complete cycle.
    So as you can see Q1 and Q2 are ON for the "very short" time ( C1 charging phase).
    And they are OFF for "long time" (C1 discharging phase). And the speaker play the sound only when Q1 and Q2 are ON.

    Attached Files:

    Last edited: Dec 17, 2013
  13. Dec 17, 2013 #12
    Thanks for the response Jony130!

    Right, got it.

    Oh I see. I think I was missing that. I understood Q2 was in saturation region, but it didn't dawn on me that since it was pretty much a closed circuit thru Q2 ce (limited only by the "saturated" --wrong term likely-- inductor coil) so this starves Q1 base of current via the resistors. Is that right? I understand the Q1 be voltage drop is .7v. But the voltage at Q1 base is based on resistor values, no?

    So the "discharge" is somewhat artificial since it is being "forced" to discharge via the Q2 collector current?? It's not just discharging because of negativity potential available on its left circuit side (Q1 base etc)?

    Also, notice in your (very helpful) diagrams, the speaker is always pushed out, never back. When is it retracted to move air?

    Aren't we assuming here that the cap had time to reach dc blocking state before Q2 started giving it counter charge on its right which it currently is in the state we are talking about here (Q2 is providing feedback via C1)?? How do we know it is fully charged from left for sure? Assuming it is not fully charged from left and still charging, it could never fully charge from left now that it is getting feedback from the right? I would think as long as it is getting feedback it could never fully charge from the left. But it probably doesn't matter. Now it will get charged from the right until fully charged...

    You mean fully charged now from the right via Q2, yes? That makes sense.

    C1 may still be being charged from the left AND from the right, no? And at some point C1 will equal 0v again (because of that charging via both sides), no? Eventually it will cross over from positive charge to negative charge (however you want to look at it)? That 0v deal makes special things happen (like the initial starting of the system).

    But Q2 ce is no longer saturated and no longer near 9v. So plenty of current available now thru resistors to keep Q1 base on now, no? I'd like to understand why Q1 isn't forward biased now via the resistors. What is starving Q1 base here?

    Notice how that speaker has never yet retracted?? It's always being pushed out. I guess at this point the transistors have stopped and that starves the speaker of current which withdraws it to 0v (but never negative?).


    Hopefully with a bit more help I'll fully understand this thing.

    It seems impossible to actually test verify what is going during these various stages. For instance, I couldn't get this simple cap/led combo (shown in bottom of this page: http://hyperphysics.phy-astr.gsu.edu/hbase/electronic/relaxo.html) to "flash" because its just not possible to slow it down... if you try you affect the behaviour.

    I still say it's all magic! And all this stuff is just to convince us that it's not!! :)
    Last edited: Dec 17, 2013
  14. Dec 17, 2013 #13
    Well I thought I understood this circuit and posted a big explanation of how I understood it but now I'm stll unsure... what a mind screw this thing is.
    Last edited: Dec 17, 2013
  15. Dec 18, 2013 #14
    Yes resistors don't provide enough Q1 base current to keep Q2 in saturation.
    And this additional current is provided by the cap, when cap is charging from right to left.
    From Vcc --> Q2 emitter-collector ---> C1 ---> Q1 base-emitter junction --->GND
    And this charging current is very large because we almost short Q1 base to Vcc via C1 cap. And cap will charge very quickly.

    When Q1 is in active region Vbe voltage is determined by base current.

    As I said cap has already been charged to 0.6V, the positive voltage at Q1 base.
    And so as Q1 and Q2 start to conduct the current. Voltage at Q2 collector start to rise.
    So the voltage at right capacitor plate also start rising. And this is why C1 cap start "discharging" phase.
    Because of the voltage change across capacitor plates. So the voltage on C1 will drop from 0.6V to 0V( end of discharging phase) but the current will continue to flow in the same direction because capacitor voltage is 0V but circuit want 9V at point Y and 0.6 at point X. So we have a potential difference and this is why current will flow and charging up the cap in the opposite polarity (from right to left).

    Only when Q1 and Q2 are ON (in saturation) the IcQ2 current is large enough to push the coil.


    Just before this cap was rapidly charged from right to left. Because at point Y we have 9V and at point X we have 0.6V (Vbe voltage drop). So once the voltage at the terminals of the cap is equal to VY - VX = 8.4V the capacitor is fully charged and the current stops flowing through the cap, the charging phase is over. At the same time Q1 base current drop because cap no longer provide any current to Q1 base. And now the base current is to small to sustain Q2 in saturation. And this mean that voltage at point Y start to drop. From 9V to say about 8.9V. And now the magic of a positive feedback comes to play. The situation look like this:
    Cap has been previously charged to the voltage around 8.4V. This voltage on C1 capacitor cannot suddenly change (charged capacitor act as a voltage source), so when the voltage on point Y start to drops, this voltage drops because C1 stop provide additional base current needed to sustain Q2 in saturation, the "left" plate of C1 decrease the voltage at point X (pulls down the voltage). And this drop in X voltage is equal to VX = VY = Vcpa = 8.9V - 8.4V = 0.5V decreases Vbe and base current even further.
    And this will cause that the voltage at point Y will drop even faster. And this drop will immediately be feedback via C1 and this will cause X voltage to drop even more faster. For example
    For VY = 8.9 we have VX = 0.5V and this will drop VY to 8.88V and VX voltage to 0.48V.
    So the base current provide by R1 and R2 also must decrease his value because transistor will be almost completely OFF for for such a low Vbe voltage. At the same time this current (R1 and R2) cannot flow through capacitor why? The answer is very simple. How can current flow from lower potential to the higher potential ? At point X we have 0.48V and at pot Y we have 8.88V. And this is why this resistors current can not flow through the cap. At the same time Q1 transistor also enter cut-off so this resistive current must drop to 0A.
    As you can see we have a very strong positive feedback via C1 cap in this circuit.
    So as voltage at pint Y start to drop the C1 cap (previously charged to 8.4V) pulls down voltage at point X. And the smaller to voltage at point X the large drop in VY voltage. And this drop in VY voltage pulls down the voltage at point X even further. So eventually Q1 and Q2 will cut-off completely and this will force VY voltage to drop to 0V and cap will force (pulls down) X voltage below gnd. Now VX is equal to VX = -8.4V. I hope you see this "positive feedback" action.
    And now the current through R1+R2 can flow. Because we have 9V at the Vcc, -8.4V at point X and 0V at point Y. And now C1 cap will act very similarly to a voltage source and start very slowly the discharge phase in the circuit:
    C1 right plate ---> speaker---> power supply ----> R1 + R1---> C1 "left" plate.
    Eventually cap will be fully discharge (0V across the cap) but the current will still flow in the same direction because there is a potential difference across R1+R2, so the capacitor will start the charging phase in the opposite direction up to the point where voltage at point X reach 0.6V.

    And to help you understand what is going on in the circuit I show you a simulation plot.
    For VY and Vx voltage.

    Attached Files:

    • 2.PNG
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    Last edited: Dec 18, 2013
  16. Dec 18, 2013 #15
    Thanks for that Jony130! I'm still working thru your last part and trying to understand the actual numbers. But I wanted to present things in a way I can understand a bit better via some the various states being presented in a way I currently understand. Perhaps you can pinpoint where I'm going wrong that way.

    So here's what I've got (states A thru G after the initial no power state):

    NOTE!! I realized later in this thread that my assumptions here regarding the cap "opposing" current was incorrect as stated here so disregard that in the verbage below (although the behavior is pretty much the same) :

    Before power-on state:
    Q1 base 0v (cutoff mode)
    C1 at 0v, not charging from left or right
    Q2 collector 0 current
    speaker 0 current

    States A-G:

    Q1 base 0v (cutoff mode)
    C1 charging from left, not from right
    Q2 collector 0 current
    speaker a little current via C1 charging
    I'll call this: "C1 charging from left, cutoff mode, speaker trying to move outward but small current"

    Q1 base .7v (linear mode)
    C1 no longer charging from left (at .7v), just starting to charge from right
    Q2 collector some starting current
    speaker getting some current via Q2
    I'll call this: "C1 begins charging from right, linear mode, speaker moving outward more now"

    Q1 base > .7v (increasing linear mode towards saturation)
    C1 decreasing left side positive .7v charge, charging more from right (left side becoming negative)
    Q2 collector giving more current due to C1 basically shorted or near 0v and C1 providing feedback
    speaker getting some current via Q2 but most going to C1
    I'll call this: "C1 feeding back into base, linear mode nearing saturation, speaker moving outward more?"

    Q1 base declining voltage towards .7v (starting to decline from either saturation mode or high linear mode)
    C1 left side negative charged, charge begins to slow down on right due to C1 opposition to voltage
    Q2 collector slows down current due to C1 increasing opposition to charging due to its charge
    speaker getting some current but dropping via Q2 based on slowing current into Q1 base from C1
    I'll call this: "C1 feedback slowing, saturation/linear mode heading towards cutoff, speaker moving backwards to 0v idle"

    Q1 base at negative voltage due to C1 left side negative charge (cutoff mode)
    C1 left side heavy negative charge, right side has stopped due to cap being filled to supply voltage
    Q2 collector 0 current, negative voltage on left side of C1 prevents Q1 forward bias thru resistors
    speaker getting no current
    I'll call this: "C1 right charged, cutoff mode, speaker 0 current"

    Q1 base at negative voltage due to left side C1 charge
    C1 discharges to the right thru the speaker (path to ground)
    Q2 collector 0 current
    speaker gets C1's discharge current
    I'll call this: "C1 discharge to right, cutoff mode, speaker big current from C1"

    Q1 base at 0v (cutoff mode)
    C1 at 0v, not charging from left or right
    Q2 collector 0 current
    speaker 0 current
    I'll call this: "initial state reached"

    And the process repeats

    Obviously these are my assumptions here. I guess my biggest question is does state F really occur?
    Last edited: Dec 18, 2013
  17. Dec 18, 2013 #16
    Jony130, I believe you are saying there is a discharge and that state F does occur when you said:

    C1 right plate ---> speaker---> power supply ----> R1 + R1---> C1 "left" plate.

    So it sounds like I'm on track there. It will help if I go over your numbers I'm sure I'll learn more from that as I'm a bit sketchy in understanding all the voltage drops. Thanks so much for the help!!
  18. Dec 18, 2013 #17
    I must confess that due to language problems I'm not quiet understand your description. Mainly I do not understand your capacitor description e.g. "C1 left side negative charged, charge begins to slow down on right due to C1 opposition to voltage", "C1 left side heavy negative charge, right side has stopped due to cap being filled to supply voltage". It looks like you have problem with capacitor and how its work. Nonetheless your steps from A to G looks OK.
  19. Dec 18, 2013 #18
    Right. I was confused about how capacitor works. They oppose a CHANGE in voltage, not oppose voltage the more they get charged (that's what I was thinking). Thanks for pointing that out! That should help me to understand better as that was throwing me off (and why you didn't understand what I wrote!).
  20. Dec 18, 2013 #19
    At first glance you can treat capacitor as a some kind of a voltage source. The capacitor act very similarly to a voltage source. The key equation is this I = C*dV/dt
    The capacitor current is proportional the rate of voltage change across it (proportional to how quickly the voltage across capacitor is changing). The faster the voltage change (frequency of a AC signal is high) the large the current flow through capacitor (short at high frequencies).

    For example for this circuit


    We have a switch in "B" position. So we apply a 1.5 volts to the circuit.
    At the beginning of the charging phase the capacitor is empty, and so Vc1 = 0V
    The voltage on capacitor cannot change suddenly form 0V to 1.5V. We need time to voltage on capacitor to grow (t≈5*R*C).
    So immediately after we connect the supply voltage a current will begins to flow.
    And all voltage from power supply appears across R1 resistor, VR1 = Vsupply. Because of a II Kirchhoff's law, 1.5V = Vc1 + VR1 and since Vc1 = 0V( empty capacitor) VR1 must be equal to 1.5V.
    So we can say that empty capacitor act just like a short circuit because there is no voltage across it. As the capacitor begins to charge, the voltage across the capacitor begins to increase.
    At the same time the current in the circuit begins to decrease. Why? Because the voltage across the capacitor begins to increase. So voltage across resistor must decrease (Vsupply = Vc1 + VR1).
    And this is why charging current begins to decrease.
    The capacitor eventually charges to the full voltage source potential. When this happens, all circuit current stops, because now Vc1 = 1.5V and VR1 = 0V If so no current can flow (Ohms law I = V/R = 0V/R = 0A).

    And Vc1 in red show voltage across capacitor during the charging phase.
    And VR1 in red show resistor voltage during the charging phase.

    Can you describe what will happen in this circuit after we flip the switch into A position?
    And can you tell me what is the voltage across the LED immediately after we flip the switch?

    Attached Files:

    • 1.PNG
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    Last edited: Dec 18, 2013
  21. Dec 18, 2013 #20
    Right... 1/2 second in this case. So instead of time constant formula R*C (63% charge) you use 5 for full charge? Is that what you did there? I didn't know that, very useful.

    Oh I didn't realize this. This is very useful... since you can't give the cap a resistive value. Then you can use ohm's law to determine current across each component (since voltage varies but current same in series components).

    One question I have about your circuit though... doesn't the led start to light once the cap charges to .7v (forward bias or whatever it is 1-2v for the specific led) and then the cap stops charging at that voltage? Perhaps you were first talking about the cap charging as if the led wasn't there?

    After thinking about it, you're probably implying that the led has a forward bias of > 1.5v ... so the cap fills before it ever lights. Then it lights when the switch is thrown via the extra cap voltage stored.

    I'm not sure what you're pointing to here, sorry.

    Basically it would cause the cap to discharge thru the led (due ?partially? to Vsupply) along with Vsupply powering the led thru R1. I guess I get a bit confused with parallel circuits still so that may throw a wrench into things also that I'm not seeing.

    Then I think the cap would eventually fill again and block and the light would go out (assuming its forward bias is > 1.5v).

    Well here's my guess: 2.5 volts.

    Obviously Vsupply = VR1 + Vled.

    First you would get the Vled.
    Vled = Vsupply - VR1.

    VR1 = Vsupply - Vled. If we assume the led voltage drop is 1v then VR1 drop would have to be .5V.

    So the voltage across the led would be 1v (Vsupply - VR1) PLUS the capacitor voltage of 1.5 volts. So 2.5 volts? That's probably wrong lol but its my best attempt right now.
    Last edited: Dec 18, 2013
  22. Dec 19, 2013 #21
    Yes, capacitor is "fully" charged after a period of five time constant.

    I use LED diode and the red LED has the lowest forward bias voltage around 1.5..1.6V.
    So for sure LED won't start to light.

    Exactly, you got this part right.

    This diagram explain everything.


    So immediately after we flip the switch the voltage across the LED is equal to 3V.
    Exactly in the same time discharge current will start to flow. So the the voltage across to cap will start to drop. So the LED will blink.

    Attached Files:

    • 1.PNG
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  23. Dec 19, 2013 #22
    Doesn't there have to be a voltage drop (even if in opposite direction) on R1? That's what I was calculating in. But I definitely missed C1 discharging thru R1 the way you show. Good stuff. I've learned a lot.
  24. Dec 20, 2013 #23
    Why do you think that in this circuit any voltage across R1 resistor will have any effect on diode voltage?
  25. Dec 20, 2013 #24
    So perhaps you're saying that since R1 and C1 are in parallel now, and so both parallel branches should see the same voltage which would be per led's limiting drop of 1.5v (or whatever we said)? So they both get different current but the same voltage since they're parallel? Why does the led get 3v then?
  26. Dec 20, 2013 #25
    Yes, in parallel circuits the voltage is the same across components.
    And this is why VR1 = VC1 = 1.5V.

    Why? Well because II Kirchhoff's law says so.
    To measure the voltage we need two point in the space. One of this point is treat as a reference point (GND). We have a very similar situation when we try to measure a height of an object. We need a reference point. The most common reference point is "above mean sea level". But when you measure the height of your kitchen table in your house you pick the floor as a your reference point.


    So for our circuit we have this situation.


    As you can see I pick GND at the bottom as we usually do.

    And now we can tell the voltage at point A and B with reference to gnd.
    As you can see the voltage at point A is 1.5V higher then ground. And voltage at point B is 3V higher then ground. And the voltage across R1 is equal to VB - VA = 1.5V also notice that capacitor is also connect between this two point ( VC1 = VB - VA = 1.5V).
    I hope that now you see why in parallel circuits the voltage is the same.
    Also notice that diode is connect between point B and GND. And this is why Vdiode = VB - Vgnd = 3V - 0V = 3V.

    Attached Files:

    • 1.PNG
      File size:
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