Measurement of Ciss, Coss, Crss

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SUMMARY

This discussion focuses on measuring the input capacitance (Ciss), output capacitance (Coss), and reverse transfer capacitance (Crss) of an n-channel JFET. Ciss is defined as the sum of gate-drain capacitance (Cgd) and gate-source capacitance (Cgs) when the drain and source are shorted. Coss is determined when the gate and source are shorted, resulting in Cgd plus drain-source capacitance (Cds). Crss is measured when all terminals are shorted, yielding only Cgd. Accurate measurement requires a high-quality capacitance meter capable of detecting values in the picofarad range and techniques to nullify stray capacitance effects.

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I'm trying to devise some circuits to measure Ciss, Coss, and Crss for an n-channel JFET, and I'm running into trouble. I know these measurements are made all the time, but can't find any information anywhere about how one would go about actually measuring them. I am also confused by Crss in general because if the gate, drain, and source are all shorted where does Cgd come into play?

Ciss is when drain and source are shorted to each other, gives you gate-drain capacitance (Cgd) in parallel with gate-source capacitance (Cgs) so Ciss = Cgd + Cgs

Coss is when gate and source are shorted, gives you Cgd + Cds (drain-source capacitance)

Crss is when gate, source, and drain are all shorted together, gives you Cgd
 
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Do you have access to a good quality capacitance meter that can measure accurately down in the pF range? Are you familiar how to null out the effects of the stray capacitance of your fixture?
 

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