Optimizing Phase Current Measurements with Shunt Resistors

[PhysicsTest]

TL;DR

To understand the logic of phase current measurement in 3 phase AC motors using shunt resistors from a reference application note.

I have seen an application note of how to measure the phase currents using shunt resistors as shown below

I am only confused with the connection when measuring the phase Ia current, it differs from the way the shunt resistor is connected for Ic and Ib, he could have done the same way like Ib and Ic. Is there any advantage doing like this? By using Ia he was also able to detect the fault in the phase currents? My question is what are the conditions under which the phase currents can be wrong like one condition i can think of is
a. Ia+Ib+Ic $\neq$ 0.

 

[Baluncore]

The asymmetric wiring does seem very deliberate.

I have seen an application note of how to measure the phase currents using shunt resistors as shown below

Can you please give a reference to the application note.
Do you have a link ?

 

[PhysicsTest]

The asymmetric wiring does seem very deliberate.

Can you please give a reference to the application note.
Do you have a link ?

Yes, Thank you, please find the attachment of the application note, i am referring to the page no 34. The link for the same is
https://www.microchip.com/developmenttools/ProductDetails/dm330021-2

 

[PhysicsTest]

Any advise?

 

[Baluncore]

The current sum is part of a hardware over-current detector.
The current sum can also be read by software.
Channels 2 or 3 current can be read with software.
Channel 1 current can be computed from Isum - I1 - I2.

 

[PhysicsTest]

The current sum can also be read by software.
Channels 2 or 3 current can be read with software.
Channel 1 current can be computed from Isum - I1 - I2.

Thank you. I am confused about the channel notations, but i assume that Channel 1 -> I3, Channel 2 -> I1,
Channel3 -> I2. The hardware notation followed for measurement of current is different, since they want to incorporate all the three phase currents to detect the over current fault is my understanding.

The current sum is part of a hardware over-current detector.

This is based on the system, in this it corresponds to the voltage of $3.3*30/31.5= 3.14V$. Hence the $I_{sum} - I_1 - I_2 =I_3$ one of the phase currents exceeds this value then it detects the over-current?

 

[Baluncore]

Sorry for the earlier typo;
Notice that the outputs from the differential current sense amplifiers are referenced to Vref, which is half of the AVDD voltage = 3.3V / 2 = 1.65 volt.