Mis-matched pin count error in ltspice

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Discussion Overview

The discussion revolves around a mismatched pin count error encountered in LTspice when using a third-party model for a circuit. Participants explore the implications of pin connections, model compatibility, and troubleshooting strategies related to simulation errors, including both DC and AC analyses.

Discussion Character

  • Technical explanation, Debate/contested, Exploratory

Main Points Raised

  • One participant describes encountering a mismatched pin count error while using a third-party model in LTspice, seeking assistance to resolve the issue.
  • Another participant requests details about when the error occurs and suggests testing the circuit without the second amplifier to isolate the problem.
  • Concerns are raised about a potentially missing pin in the part description, with speculation that it may be a No-Connect pin.
  • A participant reports that adding a dummy pin to both the symbol and the spice model resolved the error, indicating a workaround was found.
  • Another participant shares experiences of resolving LTspice issues by ensuring all pins are connected, noting that floating pins can cause simulation problems.
  • A participant explains the concept of "arity" in the context of spice models, emphasizing the importance of matching the number of parameters and their order between the model and the schematic.
  • Discussion includes the potential pitfalls of importing subcircuits from other manufacturers, particularly regarding pin order and ground connections.
  • A later reply connects the arity requirement to the issue of missing pin sequences, suggesting that this could also lead to errors.

Areas of Agreement / Disagreement

Participants express a range of views on the causes of the mismatched pin count error, with some proposing solutions while others highlight the complexities involved in model compatibility. No consensus is reached on a definitive cause or solution.

Contextual Notes

Participants note limitations in understanding the actual part's specifications and the implications of pin connections within the model, which may affect the simulation results.

Matthew Carson
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Hi. I have a simple circuit with a third-part model. As far as I can tell using info from the internet I have everything correct, but I still get this problem. Please help me clear this log-jam, thanks!
 
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Matthew Carson said:
Hi. I have a simple circuit with a third-part model. As far as I can tell using info from the internet I have everything correct, but I still get this problem. Please help me clear this log-jam, thanks!
Welcome to the PF.

Can you upload a screenshot of your schematic? And maybe your SPICE deck for the model?
 
Thanks for the quick reply! Here is as much as I can find you might need.
show.php?id=112565.jpg

show.php?id=112566.jpg
show.php?id=112567.jpg

Code:
* VCA810
*****************************************************************************
* (C) Copyright 2012 Texas Instruments Incorporated. All rights reserved.                                           
*****************************************************************************
** This model is designed as an aid for customers of Texas Instruments.
** TI and its licensors and suppliers make no warranties, either expressed
** or implied, with respect to this model, including the warranties of
** merchantability or fitness for a particular purpose.  The model is
** provided solely on an "as is" basis.  The entire risk as to its quality
** and performance is with the customer.
*****************************************************************************
*
** Released by: WEBENCH(R) Design Center, Texas Instruments Inc.
* Part: VCA810
* Date: 01/15/2014
* Model Type: All In One
* Simulator: Pspice
* Simulator Version: v16.2.0
* EVM Order Number: N/A
* EVM Users Guide: N/A
* Datasheet: SBOS275F –JUNE 2003–REVISED DECEMBER 2010
*
* Model Version: 2.0
*
*****************************************************************************
*
* Updates:
*
* Version 1.0 : "VCA810 VOLTAGE CONTROLLED AMPLIFIER "MACROMODEL" SUBCIRCUIT
*               CREATED 7/30/04 RRS"
*               Release to Web
* Version 2.0 : Update header text
*
*****************************************************************************
* Notes:
* 1. The model still missing dc and noise to be added later
*****************************************************************************
*
* CONNECTIONS:     NON-INVERTING INPUT
*                   |  GROUND
*                   |  |  GAIN CONTROL, VC
*                   |  |  |  OUTPUT
*                   |  |  |  |  POSITIVE SUPPLY VOLTAGE
*                   |  |  |  |  |  NEGATIVE SUPPLY VOLTAGE
*                   |  |  |  |  |  |  INVERTING INPUT
*                   |  |  |  |  |  |  |
.SUBCKT  VCA810/BB  1  2  3  5  6  7  8
* CONTROL VOLTAGE
Q1   7   3  13  P
C1   3   7  1E-12
Q2   7   2  13  P
I1   6  13  384E-6
Q3  10  11  7  N
R2   6  10  2
E1  11   7  POLY(1) (3,0) 0.45  -0.11911
G3  12   0  POLY(1) (10,6) 0 1
R3  12   0  139
C3  12   0  1.145E-9
G1   6   7  POLY(1) (6,10) 13.5102E-3 -0.489
G2   0   7  POLY(1) (6,10) 1.7958E-3 2.939E-3
* INPUT STAGE
Q01  20   1  26  N
C01   1   0  1E-12
Q02  21   8  26  N
C02   8   0  1E-12
R01  20  27  1E3
D01  29  27  DX
D03   6  29  DX
R02  21  28  1E3
D02  24  28  DX
D04   6  24  DX
IS   26   7  2.32E-3
* GAIN STAGE 1
R31  31   0  1E6
G31  31   0  POLY(2) (8,1) (12,0) 0 0 0 0 1.1E-6 0
* GAIN STAGE 2
R41  41  44  20E3
C41  41  44  230.25E-15
G41  41  44  0  31  1E-3
D41  41  43  DX
E41  44  43  POLY(1) (3,0) 100.2 14.87
R42  41  45  20E3
C42  41  45  230.25E-15
G42  41  45  0  31  1E-3
D42  42  41  DX
E42  42  45  POLY(1)  (3,0) 100.2 14.87
E43  44   0  6  0  20
E44   0  45  0  7  20
* OUTPUT STAGE
E51  55  0 41 0 50E-3
D53  55  51  DX
D54  52  55  DX
D55   6  53  DX
D56   6  54  DX
D57   7  53  DZ
D58   7  54  DZ
G54  53   7  5  55  50E-3
G53  54   7  55  5  50E-3
V53  51   5  0.1833
V54   5  52  0.1833
G51   5   6  6  55  50E-3
G52   7   5  55   7  50E-3
R53   6   5  20
R54   7   5  20
.MODEL N NPN (IS=1E-12 BF=193)
.MODEL P PNP (IS=1E-12 BF=96)
.MODEL  DX  D(IS=1E-15 BV=200)
.MODEL  DZ  D(IS=1E-15 BV=50)
.ENDS
*$
 
Last edited by a moderator:
When do you get the mismatched pin count error? When you try to run a DC or AC analysis? Does it specifically say it is for that device?

Can you run the rest of the circuit without the 2nd amp and there are no problems? How about just the 2nd amp by itself with its circuitry?
 
BTW, pin 4 seems to be missing in the part description. Is it a No-Connect pin on the actual part?
 
Hi Berkeman, thanks for your help.
I had no problem with the first amp by itself, then I added in this third-party model.
I assume since the LTspice model has the same number of pins as the definition it shouldn't be a problem since it is so common. I have not looked at the actual part but I assume it must be an nc.
AC and DC analysis both give the same error.
What is odd is that ltspice says the symbol has too many pins. Where?
I added a dummy #4 pin in the symbol and and inserted the same in the spice model; it runs! Thanks for hint.
In the absence of true knowledge I can live with a workaround.
Here is the error popup:
show.php?id=112574.jpg
 
Matthew Carson said:
I added a dummy #4 pin in the symbol and and inserted the same in the spice model; it runs! Thanks for hint.
Very cool -- good idea to try adding a dummy pin. Strange that the error occurred, but I agree that you've found a good workaround.
 
This is several times now I have fixed an LTspice problem by making sure all the pins were tied to something. Pins that are allowed to float in reality need to be fixed for the sim to run in my last problem. This 'too many pins' error sort of falls into the same category: pins, pins, it's all about pins!
 
Spice is nodes, it's all about nodes.

A subcircuit in spice is like a subroutine or a function in a programming language. The technical term for the number of parameters passed is “arity”.

The node numbers of the signals connected to a subcircuit are passed as parameters. When the arity differs between the model.sym and the model.sub then LTspice can tell you, but it can't fix it. You need to know that something is very wrong and you need to fix it.

When you import a foreign spice model.sub to LTspice, the arity may be the same, but the order of the nodes may be different. LTspice can tell you if the arity is wrong but it cannot tell you if the parameter order is different. That most often happens when five terminal op-amp models are imported from other manufacturers libraries.

The other trap to watch out for when importing subcircuits is identifying connections to ground inside the model that do not have an external node such as Com or Vss. You must work out why they are there and if they are sensible.
 
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Baluncore, that arity requirement must also apply to missing numbers in a pin sequence, since everything else matched in my previous problem with the missing pin 4.
thanks for you input
Matt
 

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