Optimizing Mosfet Amplifier Problem Solution with Kirchhoff's Law and KVL

[DragonChase29]

Homework Statement

[/B]

Homework Equations

• K=0.5μ_nC_ox(W/L)
• I_D=K×(Vgs-Vt)²
• Kirchhoff's voltage Law

The Attempt at a Solution

For part A,

My initial assumption was that since we are trying to find the DC bias current(to help find K), we would use the large signal, where capacitors are treated as open circuits. The new equivalent circuit is:

Then, I thought it would be a simple KVL problem because the is no current at the gate, such that,
Ir3=0.
Thus,
(4k+2k)Id+4-10=0
and Id=1mA.

Again, since Ir3=0, that means Vgate=0 and Vgs=Vgate-Vsource=0-(1mA)*(2k)=-2V

That would mean Vov=Vgs-Vt=-2-2=-4V[/B]

This would mean that Vds>Vov, which means the mosfet is in active region and the
equation
Id=K(Vov)² cabn be applied.
Thus K=(1mA)/(-4)²=62.5 μA/V

I am sure this is completely wrong, but it is all I have at the moment.

With B, I am not sure how to accomplish this. I have been googling, and it stated I needed the DC and AC load lines. My DC load line was:
Id= (1/600)-Vds/6k

but that is all I have.

Please, any assistance wou;d be greatly appreciated.

 

[rude man]

Id=1mA.

Good so far. In fact, nicely done.

Again, since Ir3=0, that means Vgate=0

Whence this? If there is no current thru the 1 meg then what does the gate voltage have to be? Fix this & we can continue.

 

[DragonChase29]

Good so far. In fact, nicely done.Whence this? If there is no current thru the 1 meg then what does the gate voltage have to be? Fix this & we can continue.

Wait... If there is no current through the resistor, the gate voltage has to be 0. I'm sorry, maybe I am not understanding something...

 

[DragonChase29]

LOL... just figured it out. Since the voltage across the 1Mohm resistor is Vd-Vgate, if the current is 0 amps, then Vgate=Vdrain, which is 6V.

 

[DragonChase29]

Then, Vgs=4 V and the active equation still applies

K=Id/(Vov)²=0.25 mA/V

 

[rude man]

Then, Vgs=4 V and the active equation still applies

K=Id/(Vov)²=0.25 mA/V

That is ever so much better!

 

[DragonChase29]

Now onto part B, which is really confusing me. Any resources?

 

[rude man]

Now onto part B, which is really confusing me. Any resources?

Were you given values for C1 and C2? This part can only be solved given C1 and C2, together with the operating frequency. That's because the 1 meg feedback resistor plays a part in the answer to some extent depending on the above parameters.

What you can otherwise do is assume high values for C1 and C2. In which case the 1 meg plays no part. Just apply a sine voltage about the dc value of Vg which you have calculated in (a) and solve for Id and consequently Vd.

 

[DragonChase29]

We were not given capacitor values. My assumption is its in the mid band, so they are shorted when doing small signal..

 

[rude man]

We were not given capacitor values. My assumption is its in the mid band, so they are shorted when doing small signal..

Yes, that's what I meant in my previous post. Just vary the gate voltage and compute the effect on Id, and then look at the effect on Vd and how big a voltage swing you can get there without clipping the sine wave.

 

[DragonChase29]

Yes, that's what I meant in my previous post. Just vary the gate voltage and compute the effect on Id, and then look at the effect on Vd and how big a voltage swing you can get there without clipping the sine wave.

I am sorry...I don't understnad this. Vary the gate voltage...How do I know when I clip the sine wave?

 

[rude man]

I am sorry...I don't understnad this. Vary the gate voltage...How do I know when I clip the sine wave?

Make a graph of I_d vs. V_g: I_d = K(V_g - I_dR1 - V_T)^2, then V_out = I_d*R2.
There is however a problem: this circuit will not give you a sine wave output for a sine wave input if you assume C1 = C2 = infinity. So the answer would then be that only very small sine inputs give a quasi-sine output. To determine how small you have to compute I_d(V_g) and see under what condition I_d is somewhat linearly related to V_g. I have the answer if you get that far.

 

[DragonChase29]

Make a graph of I_d vs. V_g: I_d = K(V_g - I_dR1 - V_T)^2, then V_out = I_d*R2.
There is however a problem: this circuit will not give you a sine wave output for a sine wave input if you assume C1 = C2 = infinity. So the answer would then be that only very small sine inputs give a quasi-sine output. To determine how small you have to compute I_d(V_g) and see under what condition I_d is somewhat linearly related to V_g. I have the answer if you get that far.

Thanks for all your help, rude man. Unfortunately, I still am not understanding the method that you are describing. From what I was told, I would need the DC load line and the AC load line. I don't know how to get the AC load line and what to do after

 

[rude man]

Thanks for all your help, rude man. Unfortunately, I still am not understanding the method that you are describing. From what I was told, I would need the DC load line and the AC load line. I don't know how to get the AC load line and what to do after

Thanks for all your help, rude man. Unfortunately, I still am not understanding the method that you are describing. From what I was told, I would need the DC load line and the AC load line. I don't know how to get the AC load line and what to do after

I've never been too crazy about load lines. Not sure they're even appropriate here since the cicuit is nonlinear. In any case, one way or another you have to effectively do what I wrote in my previous post: graph I_d vs. V_g, then V_out = E - I_dR₂ with E = 10V.

There is a small-signal gain which I think you mean by "AC" which you calculate by taking ∂I_d/∂V_g after you get your expression for Id in terms of V_g and V_T. For your circuit this gain is ∂I_d/∂V_g = 0.67/R₂.