PMOS diff amp - common mode input range

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The discussion focuses on calculating the input common mode range for a PMOS differential amplifier. The user seeks equations for the maximum (Vmax) and minimum (Vmin) input signal ranges, expressing uncertainty compared to NMOS configurations. A participant asks for rail voltages and suggests moving the query to a homework forum, but the user clarifies it is for general use. The user provides NMOS equations and requests guidance on voltage drops specific to PMOS configurations. The conversation emphasizes the need for clear equations to determine the common mode input range in PMOS differential amplifiers.
BillyBobjoe
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Hi

Can someone help me on how i can calculate the input common mode range for this pmos diff pair. I'd have an idea if it was an NMOS diff pair but am kinda uncertain of this.
I'm looking for equations for the input signal ranges of Vmax and Vmin

Thanks
 

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anyone any help on this?

Thanks
 
BillyBobjoe said:
Hi

Can someone help me on how i can calculate the input common mode range for this pmos diff pair. I'd have an idea if it was an NMOS diff pair but am kinda uncertain of this.
I'm looking for equations for the input signal ranges of Vmax and Vmin

Thanks

What are your rail voltages? All that you show so far is the 50uA mirror bias...

Also, is this coursework? I should move it to the Homework Help forum if it is, and you need to show your own work in order for us to help you.
 
No its not a homework question. just for general use.
it doesn't mater what the rail voltages are i just want a general equation for the common mode input range for a pmos diff pair

if it were a nmos diff pair then the eq's would be
Vin_min = Vds(n6) + Vgs(n1)
Vin_max = Vaa + Vgs(p3) - Vds(n1) +Vgs(n1)

where n6 would be the nmos current mirror transistor, N1 - from the diff pair
p3 - pmos transistor above N1 of diff pair

so basically I'm just unsure on where the voltage drops are across for when i am using a pmos diff pair.
I would like help with these equations for the image attached in the first post.
Thanks
 
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