How to Design a Microvolt Pulse Detector Circuit with High Gain and Low Noise

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Discussion Overview

The discussion revolves around designing a microvolt pulse detector circuit capable of detecting 100 µV pulses with a pulse width of approximately 10 µs. Participants explore various circuit architectures and techniques to achieve high gain and low noise, particularly focusing on amplification methods suitable for interfacing with an FPGA.

Discussion Character

  • Exploratory
  • Technical explanation
  • Debate/contested

Main Points Raised

  • One participant suggests using a standard instrumentation amplifier layout but expresses concerns about non-ideal effects of op-amps, particularly regarding common mode noise and DC offset.
  • Another participant recommends using multiple amplification stages and a large capacitor at the output of each stage to mitigate DC offset issues.
  • A different viewpoint emphasizes the importance of tolerance in pulse width and suggests using AC amplification stages with bandpass filtering to reject noise, cautioning against high Q factors in filters.
  • One participant argues that a bandpass filter may distort the waveform due to its components down to zero frequency and proposes using a smaller voltage gain followed by a peak reading square law diode detector.
  • Another participant shares that they successfully implemented a solution using LTspice, prompting curiosity from others about the details of their approach.

Areas of Agreement / Disagreement

Participants express a range of ideas and suggestions, with no consensus reached on a single optimal approach. Various methods for addressing the challenges of high gain and low noise are proposed, indicating ongoing debate and exploration of the topic.

Contextual Notes

Participants mention specific challenges such as non-linear distortion at high gains, the impact of DC offset, and the potential for distortion from bandpass filtering, but do not resolve these issues or provide definitive solutions.

Who May Find This Useful

Individuals interested in circuit design, particularly those focused on low-voltage signal detection and amplification techniques, may find this discussion relevant.

donpacino
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I am currently working on a small personal project to design a few circuits. I am trying to built a circuit that can detect 100 uV pulses with a pulse width of about 10 uS. I'd like to boost the voltage to a value readable by an FPGA (let say ~2 volts). I'm currently thinking about the architecture I want to use to solve this problem. I'd like your input on my approach and maybe some suggestions for other circuit layouts to use.

Initially I thought about using a standard instrumentation amplifier layout similar to the one seen in the link below. However I am concerned with the non ideal effects of the op amps.

hhttps://upload.wikimedia.org/wikipedia/commons/thumb/e/ed/Op-Amp_Instrumentation_Amplifier.svg/400px-Op-Amp_Instrumentation_Amplifier.svg.png

The required gain to get to 2 volts is 20,000. with a CMRR of 100 that would be multiply common mode noise by 200, which could be fairly significant. With the dc offset introduced by the op amps an subsequent amplifier stages would greatly increase any noise, even with a good CMRR.

That being said, the best I could come up with is a 2 stage instrumentation amp, followed by another diff amp stage. I have large dc offset and would appreciate any architecture ideas.

thanks!
 
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donpacino said:
That being said, the best I could come up with is a 2 stage instrumentation amp, followed by another diff amp stage. I have large dc offset and would appreciate any architecture ideas.
Multiple stages is a good idea. A gain of over 1000 for an opamp is likely to produce a fair amount of non-linear distortion. To get rid of the DC offset, use a large value capacitor (100uF should be ample even for fairly low frequencies) at the output of each stage.
 
donpacino said:
100 uV pulses with a pulse width of about 10 uS
How much tolerance is in the "about 10us" number? I'd recommend using AC amplification stages with bandpass filtering around the fundamental frequiency of these pulses. That will help you to reject the noise as well. I wouldn't make the Q too high for the filters, since you want single pulses to get through.
 
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Hey good ideas from both of you.

The 10 us is a hard minimum length (highest frequency) that would be seen. the longest would be 50 us.

Thanks for the advice.
 
The waveform has components down to zero frequency, so a BPF will produce distortion and may result in an incorrect voltage reading. The gain being asked for is very high, 86 dB, and is not easy. I would tend to use a smaller voltage gain of, say, 20 and then use a peak reading square law diode detector. This can then be followed by some DC gain. The diode can be followed by a current-to-voltage converter op-amp circuit, which will work very well.
 
Thanks for the help everyone, I got it working fairly well using ltspice!
 
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donpacino said:
Thanks for the help everyone, I got it working fairly well using ltspice!
Well, are you going to tell us how you did it? We too like to learn!
 
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