PWM sweep from 0 - 100% duty cycle in LTSpice

[PhysicsTest]

TL;DR

How do i sweep pwm in ltspice from 0% to 100% duty

How do i simulate the PWM signal with duty from 0% to 100% in Ltspice.

I can generate a pwm signal with single duty.

 

[Baluncore]

Do you want to plot some variable, as a function of duty cycle from 0 to 100% ?
How many cycles do you require across the plot ?

 

[PhysicsTest]

I want to check the inductor current as the PWM voltage source duty varies from 0% to 100% duty.

 

[Baluncore]

For any PWM duty, it will take a number of cycles to settle to a new average current, so it is probably best to stack several plots on the one graph. Each plot for a different DC%.

To do that, I would .PARAMeterise the duty, then use a .STEP to sweep through a number of values.

The average current, for the cycle at the end of each sweep, could be .MEASured and recorded in the log file.

 

[Baluncore]

Attached is an example.

 

[PhysicsTest]

My idea is i want to generate a sine output current across inductor by varying the PWM duty. I want to simulate the same in LTspice. I am trying it.

 

[Baluncore]

My idea is i want to generate a sine output current across inductor by varying the PWM duty.

That appears to be a different problem.
What frequency sine wave, 50/60 Hz ?
What frequency is the PWM, 100 kHz ?
Does "current across inductor" mean you want to produce a sinusoidal magnetic field, by the changing current flowing through an inductor?

 

[PhysicsTest]

It is 50Hz and pwm frequency is 20khz. First step is only to change current in the inductor as a sinusoid by making the pwm duty changes.

 

[DaveE]

How will you deal with the DC offset? PWM between 0 - 5V will have a DC component which will make the inductor current grow without limit.

What sort of accuracy can you tolerate? There are some pretty easy schemes to follow a sinusoidal reference with a ramp and comparator function, but they are not precise. They will have harmonic distortion.

50Hz is 2.6 decades below 20KHz, so you might just put in a continuous time sinewave instead of pwm as a good approximation.

edit:
"a DC component which will make the inductor current grow without limit."
Oops! sorry, This is wrong, I forgot about the series resistor which determines the DC current.

 

[PhysicsTest]

I am not sure why my results are not matching with circuit in post3

For t=2ms i used the below equation

But the answer does not match at t=2ms it is around 2.4A. I am really confused not able to solve basic circuits.

 

[Baluncore]

First, ignore the ripple.
Average the voltage or current over one full cycle.
For 100% duty cycle; duty = 1.00 ; I(L1) = V1 / R1;
For any other duty, averaged over each full cycle;
Vd = duty * V1;
Id(L1) = duty * V1 / R1.

 

[PhysicsTest]

But if i see the below website he gave an example for Capacitor
Capacitor should i not follow the same for inductor?

 

[Baluncore]

But if i see the below website he gave an example for Capacitor should i not follow the same for inductor?

That depends on what you are trying to simulate.

The voltage on a capacitor will increase and decrease in a decaying exponential when supplied with a PWM voltage. The average capacitor voltage will depend on duty cycle and the PWM voltage.

The current through an inductor will increase and decrease in a decaying exponential when supplied with a PWM voltage. The average current will be the PWM voltage * duty / circuit resistance.

If you are interested in the ripple amplitude, then that is another question.

What exactly has this topic become?

 

[PhysicsTest]

I have lot of questions to understand and i do not want to start new threads, but related to the first question which i have to solve.

 

[Averagesupernova]

@PhysicsTest I'm not 100% sure I understand your question. Or maybe more accurately, you are not 100% sure what you should be asking or how to ask. I would recommend you read the following link. It is a discussion about generating signals using PWM and the resulting spectrum. Maybe it won't be helpful to you, but I think it's worth a shot.
https://www.physicsforums.com/threa...for-sine-wave-generation.996779/#post-6425115

 

[TonyStewart]

My idea is i want to generate a sine output current across inductor by varying the PWM duty. I want to simulate the same in LTspice. I am trying it.

Errors are always made with the wrong assumptions. So check mine. I assume this is a unipolar 0 to 5V square voltage signal. This makes a big difference from bipolar signals because of the DC component.

1. Inductor current integrates a step voltage, the resulting PWM current is not a sine but a triangle wave.
2. The link to the pulsed capacitor file reports ripple (V1-Vo)/2. However, by convention, they only rate capacitors for RMS current and we usually mean p-p when we say ripple going from 0 to 100% and not V(p-p)/2. The maximum ripple current will be when the duty factor is 50% while the maximum DC current is at 100%.
3. The exponential time constant of Tau = L/R = 1.13 ms to reach ~63% of target while the PWM half cycle is 50us/2 = 25 us. After this time you can measure steady state ripple.
4. The triangular current has a DC component current which you integrate over the PWM cycle.
5. Reducing the duty factor causes the average inductor voltage to approach 0 Vdc in 10 τ=10L/R time but this raises the instantaneous positive voltage and slew rate while reducing the negative slew rate by the same amount while always maintaining 5V p-p.
6. Thus, the ripple current [p-p] is a minimum at <1% and >99% and maximum at 50% while the DC current is proportional to the duty factor.
7. To choose an appropriate capacitor for such a problem is a different question not asked but worth learning. We usually de-rate the cap to achieve a certain life and not operate it at the limit which might only last 1kh or 1000 hours. The absolute maximum ripple current is reduced for thermal margin to extend hours of MTBF say from a standard rating of 85'C or an industrial rating 105'C rating and some as high as 125'C and then we convert current to RMS.

p.s.
Arrhenius Law dictates that for every approx 10 'C rise of internal temperature lifetime reduces 50%. Such that the rated RMS current squared * ESR of internal Effective Series Resistance with an elevated ambient causes the standard electrolytic capacitor to last only 1000 to 1500 hrs at 85'C at some Irms current value, which is only 60 'C above the "standard room temp" of 25'C. But don't worry about this until you have to do some real design.