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Self Bias Transistor Design Problem

  1. Nov 19, 2012 #1
    1. The problem statement, all variables and given/known data
    I have to solve for RD, RS1, and RS2.
    25s9bhj.jpg

    2. Relevant equations

    AVNL=-mg(Rd//rd)
    Vdd-Id(Rd+RStotal)=0
    Bias Line Eq: Vg-Vgsq-Idq(RStotal)

    3. The attempt at a solution
    I have solved for RD by using the AVNL equation and the given value of -8 for AVNL.
    I found RD to be 2000 ohms.

    I cannot figure out how to get Rs1 and Rs2.
    1. The problem statement, all variables and given/known data



    2. Relevant equations



    3. The attempt at a solution
     
  2. jcsd
  3. Nov 19, 2012 #2

    uart

    User Avatar
    Science Advisor

    That's not correct. The voltage gain can only be approximated as (-gm Rd) if there is no un-bypassed source resistance (RS1).

    Start by using the knowledge of Vgs (quiescent) to find the total source resistance (RS1+RS2), and then use the knowledge of Vds (quiescent) to find the value of RD.

    Finally you need to derive (or look up) a correct expression for the voltage gain to solve for RS1.
     
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