Shim Inductor in Phase Shifted Full Bridge topology

[Dextrine]

What is the purpose of the shim inductor and how exactly does it function in PSFB topology? I noticed that I had dramatically improved efficiency when I added a shim inductor to my circuit, not too sure how or why this works though.

 

[berkeman]

What is the purpose of the shim inductor and how exactly does it function in PSFB topology? I noticed that I had dramatically improved efficiency when I added a shim inductor to my circuit, not too sure how or why this works though.

Could you please post a schematic and link to more information about what you are asking? That would help a lot. Thanks.

 

[Baluncore]

See fig. 9, and the description below on page 7 of TI Application Report;
"Phase-Shifted Full-Bridge, Zero-Voltage Transition Design Considerations".
http://www.tij.co.jp/jp/lit/an/slua107a/slua107a.pdf

 

[Dextrine]

Could you please post a schematic and link to more information about what you are asking? That would help a lot. Thanks.

Sure,

Here in this document, on page 2. Ls is (plus Db and Dc). Made my circuit have much better efficiency.

 

[Dextrine]

See fig. 9, and the description below on page 7 of TI Application Report;
"Phase-Shifted Full-Bridge, Zero-Voltage Transition Design Considerations".
http://www.tij.co.jp/jp/lit/an/slua107a/slua107a.pdf

Hmmm, so it's really just to increase inductance? How does that help with efficiency? How strange. Also, how strange that I've never seen this application sheet and the 28950 is the controller I've been using! Thanks for the reply.

 

[Baluncore]

I think the problem is that the “leakage inductance” of a transformer primary is in parallel with and so is effectively short circuited by the (backward transformed) output load. That makes it “hard” to drive. By adding series inductance sufficient to cancel switch capacitance it relieves the switches of that in-phase charge transfer twice per cycle. It turns the real losses into a resonant energy circulation without real power losses.

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[Dextrine]

I think the problem is that the “leakage inductance” of a transformer primary is in parallel with and so is effectively short circuited by the (backward transformed) output load. That makes it “hard” to drive. By adding series inductance sufficient to cancel switch capacitance it relieves the switches of that in-phase charge transfer twice per cycle. It turns the real losses into a resonant energy circulation without real power losses.

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Thanks, that makes sense. I'll keep trying to understand your post better. Here is the picture (hopefully it makes it)

 

[Zzaimon]

Maybe that efficiency improvement resides in achieving a condition of (or near to) Zero Voltage Transition of Mosfets, thus minimizing switching losses.

 

[The Electrician]

I think the problem is that the “leakage inductance” of a transformer primary is in parallel with and so is effectively short circuited by the (backward transformed) output load. That makes it “hard” to drive. By adding series inductance sufficient to cancel switch capacitance it relieves the switches of that in-phase charge transfer twice per cycle. It turns the real losses into a resonant energy circulation without real power losses.

The standard transformer model is seen here: https://en.wikipedia.org/wiki/Transformer

I've reproduced it here with an addition showing a load on the secondary Zs, with its transformed version Zp shown on the primary. The primary leakage inductance is designated Xp, and it would seem to be in series with the transformed secondary load, not in parallel.

 

[Tom.G]

@Zzaimon seems to have gotten it right. To expand:

The usual timing for the FETs would be A and D turn on and off simultaneously, with B and C switching simultaneously while A,D are off. And vice versa.

from figure 3

The "new" approach has the controller chip modifying the switching times.
Notice that A,D are not switching simultaneously, and neither are B,C.

from figure 4.

In this case FET 'D' switches off before FET 'A' does; and the added inductor in the primary reduces the ringing frequency in the primary circuit.
The ringing frequency is chosen so that the voltage waveform at the FET 'D' Drain (FET 'C' Source) terminal is at its positive peak (the supply voltage) when FET 'C' is switched On. Since there is zero voltage across FET 'C' there is no turn-on loss.
And with 'C' On, FET 'A' is now turned Off.

(Whew!)

Now the Primary circuit is still in its first ringing cycle. Since 'C' is On, the right end of the primary is held at supply voltage and the ringing causes the left end of the Primary to be relatively Negative. At some point the left end of the primary is at the Negative supply voltage. When this occurs there is no voltage across FET 'B', so it is now turned on with zero turn-on loss.

Synopsis:
Starting with FETs 'A' and 'D' on, primary current flowing.
D turns Off
When the ringing voltage rises to the supply voltage, turn On 'C'
Turn Off 'A'
With ringing voltage at Negative supply, Turn On 'B'

Primary polarity switching is now complete.

That's how you get Zero Voltage Switching (ZVS) with an H-bridge power supply.

Rather clever, thanks for the thread.

Cheers,
Tom

p.s. All of this was taken from the TI App Note with a few details skipped... and fewer words to wade thru.