Hello forum, I am having a little trouble interpreting the data I got for a recent project in my fabrication lab. I created transistors of varying gate widths and lengths and am characterizing them by performing various electrical measurements. Initially, after completing my device, the IV curves for my contacts were completely ohmic. The transistors, diodes, and capacitors were working as expected. My TA thought it would be a good idea for me to go ahead and sinter anyway after I completed my electrical measurements to see what the effects would be on my transistors. It turns out, that the shapes for the IV curves were maintained, but the magnitude of the currents as functions of the drain voltage decreased after sintering. I have no idea how to explain this. Please see the attached figures for my data. The 100μm x 5μm transistor shows a lot of leakage which I explained was due to the fact that during the diffusion step in creating the source and drain, I also carried out a drive in step. This drive in step would also cause a spreading in the diffusion profile of the doped regions of the source and drain. The gate length in this case may be much smaller than 5μm. The 400μm x 20μm shows a typical IV curve for a working transistor for gate voltages of 2V, 6V, and 10V before and after sintering.