Sketch Vin-Vout in MOS transistor

  • Thread starter Thread starter anhnha
  • Start date Start date
  • Tags Tags
    Sketch Transistor
Click For Summary
SUMMARY

The discussion focuses on the common-gate configuration of MOS transistors, specifically analyzing the Vout versus Vin relationship as Vin varies from 0 to VDD. The circuit aims to enhance frequency response by mitigating the Miller effect through the inclusion of a small capacitance Cgd. Additionally, incorporating a feedback resistor Rf reduces the gain ∂Vout/∂Vin while providing some linearization, particularly in cutoff mode where ∂Vout/∂Vin equals R/Rf, with R being the parallel combination of Rd and Rf.

PREREQUISITES
  • MOS transistor operation in triode and saturation modes
  • Common-gate configuration principles
  • Miller effect in electronic circuits
  • Feedback resistor impact on gain and linearization
NEXT STEPS
  • Study the effects of capacitance in MOS transistor configurations
  • Learn about the Miller effect and its implications in circuit design
  • Explore feedback mechanisms in amplifier circuits
  • Investigate the mathematical modeling of MOS transistor gain
USEFUL FOR

Electrical engineers, circuit designers, and students studying analog electronics who are interested in MOS transistor configurations and their applications in improving frequency response.

anhnha
Messages
179
Reaction score
1
Can you help me check my work and tell me what is the application of the circuit?

Homework Statement


Sketch Vout versus Vin as Vin varies from 0 to VDD. Identify important points.


Homework Equations


MOS transistor equations in triode and saturation modes.

The Attempt at a Solution


attachment.php?attachmentid=59640&stc=1&d=1371488951.jpg

attachment.php?attachmentid=59641&stc=1&d=1371488951.jpg

attachment.php?attachmentid=59642&stc=1&d=1371488951.jpg
 

Attachments

  • 3.15_1.JPG
    3.15_1.JPG
    39.1 KB · Views: 1,439
  • 3.15_2.JPG
    3.15_2.JPG
    25.3 KB · Views: 1,089
  • 3.15_3.JPG
    3.15_3.JPG
    10.9 KB · Views: 1,565
Physics news on Phys.org
I'm not going to check your math but I can tell you that this configuration is known as the common-gate configuration, analogous to the common-base mode of a BJT.

EDIT: the purpose is to improve frequency response by eliminating the so-called "Miller effect". Put a small capacitance Cgd in the common-source configuration & you will see this. The price is a lower input impedance.

Adding Rf reduces the gain ∂Vout/∂Vin but it does linearize it somewhat (for low values of -Vin, or in cutoff mode, ∂Vout/∂Vin = R/Rf where R = Rd||Rf.
 
Last edited:

Similar threads

  • · Replies 1 ·
Replies
1
Views
3K
  • · Replies 1 ·
Replies
1
Views
2K
  • · Replies 25 ·
Replies
25
Views
7K
  • · Replies 4 ·
Replies
4
Views
2K
  • · Replies 5 ·
Replies
5
Views
5K
Replies
2
Views
2K
  • · Replies 2 ·
Replies
2
Views
2K
  • · Replies 16 ·
Replies
16
Views
4K
  • · Replies 25 ·
Replies
25
Views
4K
  • · Replies 21 ·
Replies
21
Views
3K