Solving Memory Cache Exercise: Addressing Memory & Tags

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The discussion focuses on calculating the memory address breakdown for a system with 32 MB of main memory and a 256 KB cache using 32-byte blocks. The calculations indicate that the address consists of 25 bits, with 10 bits for the tag, 10 bits for the set, and 5 bits for the word offset. There is some confusion regarding the total address size, as one participant mistakenly states it as 32 bits instead of 25 bits. Additionally, clarification is needed on the term "label," which may refer to the offset. A correction is also made regarding the cache size, emphasizing the importance of distinguishing between KB and KiB, resulting in 1024 sets instead of 1000.
MaxR2018
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Homework Statement
System with main memory of 32 MB and a cache of 256 KB with blocks of 32 bytes (1 word = 2 Bytes), determine the bits of the physical address used for words, lines of blocks or sets and labels if the cache memory has associative mapping by sets of 8 ways.
Relevant Equations
Not required
I'm triying to do thiS way, but I'm not sure.

First: I have 32Mb of so 32Mb=2^25, so the memory adress has 25 bits.
Second: with blocks of 32 bytes =2^5 bytes so the word has 5 bits.
Third: If cache has 256kb and each block has 32 bytes, so 256kb/32bytes=8000, that means i have 8000 ways. If a set has with 8 ways each one, so 8000/8=1000 sets =2^10. So set has 10 bits in the adress.

At last if the adress has 25 bits, so tag has:

25 bits - 5 bits - 10 bits = 10 bits.

End result:

Adress memory=32 bits
Tag=10bits
Set=10bits
Word=5bits

Is this well resolved?
 
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MaxR2018 said:
Problem Statement: System with main memory of 32 MB and a cache of 256 KB with blocks of 32 bytes (1 word = 2 Bytes), determine the bits of the physical address used for words, lines of blocks or sets and labels if the cache memory has associative mapping by sets of 8 ways.
Relevant Equations: Not required

I'm triying to do thiS way, but I'm not sure.

First: I have 32Mb of so 32Mb=2^25, so the memory adress has 25 bits.
Second: with blocks of 32 bytes =2^5 bytes so the word has 5 bits.
Third: If cache has 256kb and each block has 32 bytes, so 256kb/32bytes=8000, that means i have 8000 ways. If a set has with 8 ways each one, so 8000/8=1000 sets =2^10. So set has 10 bits in the adress.

At last if the adress has 25 bits, so tag has:

25 bits - 5 bits - 10 bits = 10 bits.

End result:

Adress memory=32 bits
Tag=10bits
Set=10bits
Word=5bits

Is this well resolved?
Your answer kind of agrees with what I came up with for the associative cache part, but with different terminology. Using the more common parlance of TAG, SET, and OFFSET, I got
TAG = 10 bits
SET = 10 bits
OFFSET = 5 bits.

I also agree with your original answer that the physical address contains 25 bits. But then at the end you say it's 32 bits. ?! I don't know what you mean there.

However the question also asks you how many address bits per word, where a word is two bytes. I don't think you've done that yet.

Also, I'm not sure what "label" refers to here. Is that the same thing as OFFSET? I'm not sure. Whatever the case, you'll have to answer how many address bits used to index words, lines of blocks or sets and labels.

One last thing: The problem statement says the cache is 256 KB. Notice the units "KB." This is different than "kB" and is also different than "KiB." It's important that you know what it means exactly. I interpret this as meaning 256 killobytes (same as 256 KiB [or kibibyte], but not 256 kB), where a kilobyte = 1024 bits bytes. That means the cache has 1024 sets, not the 1000 sets that you claimed. To be sure, check with your coursework, textbook, or instructor.
 
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