Strange impedance curve in LTSpice

In summary, the conversation discusses an impedance curve of a non-ideal tantalum capacitor in LTSpice and a comparison with a simulation in Octave. The LTSpice plot shows an unexpected maximum at 100MHz, which is due to a parasitic resonance in the model. The Octave simulation is ideal and does not show this behavior. The issue is resolved by disabling the parallel capacitance in the LTSpice model.
  • #1
hadoque
43
1
Hi
I'm looking at an impedance curve of a non-ideal tantalum capacitor in LTSpice. The test circuit and impedance curve is seen in this screengrab:
http://www.apspektakel.com/bilder/tantal.png"
The spice file is here http://www.apspektakel.com/bilder/tantal.asc".
So, the imdpedance curve shows the expected impedance minimum, but also an unexpected maximum at about 100MHz, where there is also a polarity switch in phase. This feature does not show up if I do an impedance plot in octave:

Code:
octave:1> f = [1000:1000:1e9];
octave:2> C = 2e-3
C =  0.0020000
octave:3> R = 2e-3
R =  0.0020000
octave:4> L = 1e-9
L =  1.0000e-09
octave:5> z = R + f.*2*pi*j*L-1./(f.*2*pi*j*C)
octave:6> loglog(f,abs(z))
octave:7> semilogx(f,atand(imag(z)./real(z)))
Which result in these plots
http://www.apspektakel.com/bilder/tantal.svg"
http://www.apspektakel.com/bilder/phase.svg"

The parameters in the octave code are the same as in LTSpice component. Anyone know where this comes from? The phases look pretty different, is there something wrong with the test circuit?
 
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  • #2
You may want to look at the LTSpice model more closely. That looks like a typical parasitic resonance curve. If the model has a parasitic inductance built into it to model non-idealities, it would look just like that. The Octave simulation is an ideal capacitor so you don't see it.
 
  • #3
Since I posted I've found out just that. The spice models has a non-zero parallel capacitance as default. It's disabled by setting the parallel capacitance to zero.
 

1. What is an impedance curve in LTSpice?

An impedance curve in LTSpice is a plot that shows the variation of impedance with frequency for a given circuit or component. It is usually displayed as a graph with frequency on the x-axis and impedance on the y-axis.

2. Why is the impedance curve in LTSpice important?

The impedance curve in LTSpice is important because it helps in understanding the behavior of a circuit or component at different frequencies. It can also be used to identify resonant frequencies and impedance matching for optimal circuit performance.

3. What causes a strange impedance curve in LTSpice?

A strange impedance curve in LTSpice can be caused by a variety of factors, such as improper component values, incorrect circuit connections, or simulation errors. It can also be due to non-linear behavior of components at certain frequencies.

4. How can I fix a strange impedance curve in LTSpice?

To fix a strange impedance curve in LTSpice, you can try adjusting the component values, checking for errors in the circuit connections, or using more accurate simulation models. It is also helpful to compare the simulation results with real-world measurements.

5. Can the impedance curve in LTSpice be exported for further analysis?

Yes, the impedance curve in LTSpice can be exported as a data file for further analysis in other software programs. This allows for more in-depth analysis and comparison with other circuit designs.

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