Time domain aliasing in VNA TDR measurement

[yefj]

Hello, alyasing by nyquist theorem where we have analog signal at some frequency and we sample it at some rate so we need the sample rate to be twice higher the the analog signal frequency.

we set TDR in VNA from negative to positive -50ns to 50ns for example
we have a circular 100s.
Our signal traveling forward then reflected signal sums with the original after a while.
this time for the reflected signal to reach the source is 2*length_till_discontinuety/phase velocity.
We start time at t=0sec
How does Aliasing comes at this point?
How Do we set the VNA time domain properly so we avoid time domain Aliasing?

 

[yefj]

Update:
so given velocity factor 77% and cable length of 0.3m given the calculation in the photo we have round trip at 2.3ns.
so given my calculation is from -50ns to 50ns I will have the TDR pulse only on the positive side.

The problem with this consept is if we have a system where we have back and forth reflections where source and load impedance differ the carateristic impedance of the line.
Then we have bounce diagram from 0 to infinity .

but in VNA we wont have time infinity we have circular time .
How double mismatch source and load will be presented on circular VNA plot?
Thanks.