Understand Mosfets (NMOS & PMOS): Why the Contradiction?

[likephysics]

This is the way I understand Mosfets (NMOS)

The source is grounded, drain is at some positive voltage V, gate is 0v initially.
When gate voltage is increased and reaches Vth, electrons from source are attracted to the gate because of the E-field at the gate. When the electrons reach the gate, they see the more +ve drain terminal and move toward the drain.
The gate voltage cannot exceed the drain voltage, else the electrons would be stuck at the gate and not flow towards the drain terminal.
When the gate voltage is increased sufficiently (still below drain voltage), the current (Ids) reaches saturation.
Is my understanding correct?

If yes, why can’t I apply the same analogy to PMOS.
The contradiction is in PMOS, when the gate voltage exceeds drain voltage (0v), the Mosfet conducts even better.
The holes from source region reach the gate bcoz of –ve potential and why would they move towards the drain. Drain is at a lesser potential than gate.

And why is inversion layer called so?

 

[MATLABdude]

The inversion layer is called that because the p-type material under the gate (in an NMOS) is the region where an n-channel forms, allowing charge carriers to flow from source to drain.

This last bit is the key bit of understanding the operation of MOSFETs (Metal Oxide Semiconductor Field Effect Transistor)--with sufficient gate voltage, the electric field allows for the formation of a conduction channel between source and drain[*]. Everything else is details.


[*]At least, this is the case for enhancement-mode devices (depletion-mode devices have a channel 'built in', which is then narrowed or shut off using the gate).