VHDL code - write to a binary .dat file

[crono1009]

I'm attempting to write some simulation VHDL code that will be able to write the output of my simulation as a single string of binary values in a .dat file.

So far I've used both the textio and std_logic_textio libraries to write the signals to a .txt file as text. Is there a library I can use to write them as binary to a .dat file?

I figure if it comes down to it I could write a simple script outside of VHDL to make the text to binary conversion but I'm inclined to do it strictly in VHDL. In the end I want to be able to view the .dat file as an image using a typical image viewer program.

 

[anorlunda]

http://www.ece.uAlberta.ca/~elliott...000_w/vhdl/BinaryFileTestbenching/binary.html