Discussion Overview
The discussion revolves around the concept of a low drift sample and hold circuit, particularly in the context of its application in digital control systems. Participants explore the meaning of "low drift" and the factors that contribute to it.
Discussion Character
- Technical explanation, Conceptual clarification
Main Points Raised
- One participant notes that a sample and hold circuit is used to maintain a steady analogue value during operations performed by a converter or other systems.
- Another participant suggests that "low drift" implies that the output remains stable during the hold time compared to previous units, indicating improved performance.
- A further contribution outlines that achieving low drift requires a capacitor with low leakage, low dielectric absorption, and a high-impedance input to the buffer amplifier in the sample and hold circuit.
Areas of Agreement / Disagreement
Participants do not appear to reach a consensus on the specific implications of low drift, but there is agreement on the factors that contribute to achieving it.
Contextual Notes
There may be limitations related to the definitions of "drift" and the specific performance metrics of sample and hold circuits that are not fully explored in the discussion.